AFE58JD28 Datasheet, PDF (2/6 Pages) Texas Instruments – 16-Channel Ultrasound AFE with 102-mW/Channel Power, 14-Bit, 65-MSPS or 12-Bit, 80-MSPS ADC, Digital Demodulator, JESD or LVDS Interface, and Passive CW Mixer

AFE58JD28
SBAS864 – JULY 2017
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4 Description (continued)
The AFE58JD28 is an integrated AFE optimized for medical ultrasound application. The device is realized
through a multichip module (MCM) with two dies: one voltage-controlled amplifier (VCA) die and one analog-to-
digital converter (ADC) die. The VCA die has 16 channels that interface with the 16 channels of the ADC die.
Each channel in the VCA die can be configured in one of two modes: time gain compensation (TGC) mode or
continuous wave (CW) mode. In TGC mode, each channel includes a low-noise amplifier (LNA), a voltage-
controlled attenuator (VCAT), a programmable gain amplifier (PGA), and a third-order, low-pass filter (LPF). The
LNA is programmable in gains of 21 dB, 18 dB, or 15 dB. The LNA also supports active termination. The VCAT
supports an attenuation range of 0 dB to 36 dB, with analog voltage control for the attenuation. The PGA
provides gain options from 18 dB to 27 dB in steps of 3 dB. The LPF cutoff frequency can be set between
10 MHz and 30 MHz to support ultrasound applications with different frequencies. In CW mode, the output of the
LNA goes to a low-power passive mixer with 16 selectable phase delays followed by a summing amplifier with a
band-pass filter. Different phase delays can be applied to each analog input signal to perform an on-chip
beamforming operation. A harmonic filter in the CW mixer suppresses the third and fifth harmonic to enhance the
sensitivity of the CW Doppler measurement.
The 16 channels of the ADC die can be configured to operate with a resolution of 14 bits or 12 bits. The ADC
resolution can be traded off with conversion rate, and can operate at maximum speeds of 65 MSPS and
80 MSPS at 14-bit and 12-bit resolution, respectively. The ADC is designed to scale its power with sampling rate.
The output interface of the ADC comes out through a low-voltage differential signaling (LVDS) that can easily
interface with low-cost field-programmable gate arrays (FPGAs).
The AFE58JD28 additionally includes a digital demodulator and JESD204B data packing blocks. The digital in-
phase and quadrature (I/Q) demodulator with programmable decimation filters accelerates computationally-
intensive algorithms at low power. The device also supports an optional JESD204B interface that runs up to
5 Gbps and further reduces the circuit-board routing challenges in high-channel count systems.
The device also allows various power and noise combinations to be selected for optimizing system performance.
Therefore, these devices are suitable ultrasound AFE solutions for systems with strict battery-life requirements.
The device is available in a 15-mm × 15-mm NFBGA-289 package and is pin-compatible with the AFE5818 and
AFE5816 family.
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