ADS7842_14 Datasheet, PDF (2/21 Pages) Texas Instruments – 12-Bit, 4-Channel Parallel Output Sampling ANALOG-TO-DIGITAL CONVERTER

PACKAGE/ORDERING INFORMATION
PRODUCT
ADS7842E
"
ADS7842EB
"
MINIMUM
RELATIVE
ACCURACY
(LSB)
±2
"
±1
"
SINAD
(dB)
68
"
70
"
PACKAGE-LEAD
SSOP-28
"
SSOP-28
"
PACKAGE
DESIGNATOR⁽¹⁾
SPECIFIED
TEMPERATURE
RANGE
DB
–40°C to +85°C
"
"
DB
–40°C to +85°C
"
"
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
ADS7842E
"
ADS7842EB
"
ADS7842E
ADS7842E/1K
ADS7842EB
ADS7842EB/1K
Rails, 48
Tape and Reel, 1000
Rails, 48
Tape and Reel, 1000
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
+V_CC to GND ........................................................................ –0.3V to +6V
Analog Inputs to GND ............................................ –0.3V to +V_CC + 0.3V
Digital Inputs to GND ........................................................... –0.3V to +6V
Power Dissipation .......................................................................... 250mW
Maximum Junction Temperature ................................................... +150°C
Operating Temperature Range ........................................ –40°C to +85°C
Storage Temperature Range ......................................... –65°C to +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PIN CONFIGURATION
Top View
AIN0 1
AIN1 2
AIN2 3
AIN3 4
V_REF 5
AGND 6
DB11 7
DB10 8
DB9 8
DB8 10
DB7 11
DB6 12
DB5 13
DGND 14
ADS7842E
28 V_ANA
27 V_DIG
26 A1
25 A0
24 CLK
23 BUSY
22 WR
21 CS
20 RD
19 DB0
18 DB1
17 DB2
16 DB3
15 DB4
SSOP
PIN DESCRIPTIONS
PIN NAME DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25, 26
27
28
AIN0
AIN1
AIN2
AIN3
V_REF
AGND
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DGND
DB4
DB3
DB2
DB1
DB0
RD
CS
WR
BUSY
CLK
A0, A1
V_DIG
V_ANA
Analog Input Channel 0
Analog Input Channel 1
Analog Input Channel 2
Analog Input Channel 3
Voltage Reference Input. See Electrical Characteris-
tics Tables for ranges.
Analog Ground
Data Bit 11 (MSB)
Data Bit 10
Data Bit 9
Data Bit 8
Data Bit 7
Data Bit 6
Data Bit 5
Digital Ground
Data Bit 4
Data Bit 3
Data Bit 2
Data Bit 1
Data Bit 0 (LSB)
Read Input. Active LOW. Reads the data outputs in
combination with CS.
Chip Select Input. Active LOW. The combination of
CS taken LOW and WR taken LOW initiates a new
conversion and places the outputs in the tri-state
mode.
Write Input. Active LOW. Starts a new conversion
and selects an analog channel via address inputs A0
and A1, in combination with CS.
BUSY goes LOW and stays LOW during a
conversion. BUSY rises when a conversion is
complete and enables the parallel outputs.
External Clock Input. The clock speed determines the
conversion rate by the equation f_CLK = 16 • f_SAMPLE.
Address Inputs. Selects one of four analog input
channels in combination with CS and WR. The
address inputs are latched on the rising edge of
either RD or WR.
A1 A0 Channel Selected
0
0
AIN0
0
1
AIN1
1
0
AIN2
1
1
AIN3
Digital Supply Input. Nominally +5V.
Analog Supply Input. Nominally +5V.
2
ADS7842
www.ti.com
SBAS103C