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TPS68000_13 Datasheet, PDF (19/26 Pages) Texas Instruments – HIGHLY EFFICIENT PHASE SHIFT FULL BRIDGE CCFL CONTROLLER
Not Recommended for New Designs
TPS68000
www.ti.com
SLVS524A – OCTOBER 2005 – REVISED FEBRUARY 2006
rV
+
CH ) CL
CH
(12)
In this case CH is the upper capacitor in the divider at the high voltage side, CL is the capacitor to GND.
Protection
The overcurrent protection comparator (OCP) is typically used to monitor output current but can be configured to
monitor any voltage. The comparator uses the internal reference voltage VREF as a fixed threshold. Any voltage
above the internal reference voltage at OCP for more than 4 clock cycles of the main oscillator causes the
comparator to trip and generate a fault. The comparator only will trip with positive voltages above the internal
reference voltage at applied to OCP. Although the input can withstand higher negative voltages there is no
rectification implemented.
Compensating the Current and Voltage Regulators
The compensation networks for current and voltage regulators are connected between the negative inputs and
the outputs of the respecive amplifier. At the current amplifier the pins are CAM (input) and CAO (output). At the
voltage amplifier VAM (input) and VAO (output) are used. The compensation network must have a dominating
capacitive characteristic, since the error amplifiers are also used for smoothing the half wave rectified feedback
input signal. capacitors in parallel with resistor and capacitor in series or just capacitors are recommended. In
typical applications a 2200 pF capacitor at the current amplifier and a 0.022 μF capacitor at the voltage amplifier
can be used.
Synchronized Burst Dimming
To configure the device for synchronized burst dimming the dimming PWM signal must be connected directly to
the BC logic input pin. The controller will turn the lamp on and off, following directly the PWM pulses applied at
BC regarding frequency, phase and duty cycle. The slopes of the lamp current are controlled internally. The other
pins used for configuring burst dimming, BBR and BF should have a defined state as well. It is recommended to
connect BBR to 5 V (V5) and to connect BF to GND.
Independent Burst Dimming
In this configuration the device generates the low dimming frequency and the duty cycle internally. To use this
feature the BC pin should be connected to GND. A capacitor connected to BF is used to program the frequency
of the low frequency oscillator. The capacitance necessary to program a given burst dimming frequency can be
calculated using Equation 13:
CBF
+
4.7
fD
mF
Hz
(13)
CBF is the capacitor required to be connected between BF and GND and fD is the low frequency oscillator
frequency which should be programmed. For example a 0.047 μF capacitor is needed to program a burst
frequency of 100 Hz.
To program the burst duty cycle a voltage at BBR is used. The duty cycle can be calculated using Equation 14:
DB + VBBR
50
%
V
(14)
DB is the resulting burst duty cycle and VBBR is the voltage applied at the BBR pin. The operating voltage range
for duty cycle programming is 0 V to 2 V. 0 V at BBR will program 0% burst duty cycle and 2 V will program
100% burst duty cycle.
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