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TPS3103 Datasheet, PDF (19/31 Pages) Texas Instruments – Ultralow Supply-Current Voltage Monitor With Optional Watchdog
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TPS3103, TPS3106, TPS3110
SLVS363F – AUGUST 2001 – REVISED NOVEMBER 2015
10 Power Supply Recommendations
These devices are designed to operate from an input supply with a voltage range between 0.9 V and 3.3 V.
Though not required, it is good analog design practice to place a 0.1-μF ceramic capacitor close to the VCC pin if
the input supply is noisy.
11 Layout
11.1 Layout Guidelines
Follow these guidelines to lay out the printed-circuit-board (PCB) that is used for the TPS310x and TPS3110x
family of devices.
• Place the VDD decoupling capacitor close to the device.
• Avoid using long traces for the VCC supply node. The VCC capacitor (CVDD), along with parasitic inductance
from the supply to the capacitor, can form an LC tank and create ringing with peak voltages above the
maximum VDD voltage.
11.2 Layout Example
Pullup
Voltage
RP1
RSTVDD
Flag
MR
Signal
TPS3106
1
6
2
5
3
4
Pullup
CVDD Voltage
RP2
RSTSENSE
Flag
Monitored
R1
Voltage
R2
Figure 19. Example Layout (DBV Package)
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Product Folder Links: TPS3103 TPS3106 TPS3110