SM320C26B Datasheet, PDF (19/42 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SM320C26B
www.ti.com
SGUS069A – NOVEMBER 2012 – REVISED NOVEMBER 2012
CONTROL INSTRUCTIONS
MNEMONIC
DESCRIPTION
NO.
INSTRUCTION BIT CODE
WORDS 15 14 13 12 11 10 9 8 7 6 5 4 3 2
10
BIT
BITT
CONF‡
Test bit
Test bit specified by T register
Configure RAM blocks as Data or program
1
1
0
0
1
D
M
D
1
0
1
0
1
0
1 11M
D
1
1
1
0
0
1
1 1 0 0 0 1 1 1 1 CNF
DINT
Disable interrupt
1
1
1
0
0
1
1 1 0 0 0 0 0 00 0 1
EINT
Enable interrupt
1
1
1
0
0
1
1 1 0 0 0 0 0 00 0 0
IDLE
LST
Idle until interrupt
Load status register ST0
1
1
1
0
0
1
1 1 0 0 0 0 1 11 1 1
1
0
1
0
1
0
0 00M
D
LST1
NOP
Load status register ST1
No operation
1
0
1
0
1
0
0 01M
D
1
0
1
0
1
0
1 0 1 0 0 0 0 00 0 0
POP
Pop top of stack to low accumulator
1
1
1
0
0
1
1 1 0 0 0 0 1 11 0 1
POPD
Pop top of stack to data memory
1
0
1
1
1
1
0 10M
D
PSHD
PUSH
Push data memory value onto stack
Push low accumulator onto stack
1
0
1
0
1
0
1 00M
D
1
1
1
0
0
1
1 1 0 0 0 0 1 11 0 0
RC
Reset carry bit
1
1
1
0
0
1
1 1 0 0 0 1 1 00 0 0
RHM
Reset hold mode
1
1
1
0
0
1
1 1 0 0 0 1 1 10 0 0
ROVM
Reset overflow mode
1
1
1
0
0
1
1 1 0 0 0 0 0 00 1 0
RPT
RPTK
Repeat instruction as specified by data memory value
Repeat instruction as specified by immediate value
1
0
1
0
0
1
0 11M
1
1
1
0
0
1
0 11
D
K
RSXM
Reset sign-extension mode
1
1
1
0
0
1
1 1 0 0 0 0 0 01 1 0
RTC
Reset test/control flag
1
1
1
0
0
1
1 1 0 0 0 1 1 00 1 0
SC
Set carry bit
1
1
1
0
0
1
1 1 0 0 0 1 1 00 0 1
SHM
Set hold mode
1
1
1
0
0
1
1 1 0 0 0 1 1 10 0 1
SOVM
Set overflow mode
1
1
1
0
0
1
1 1 0 0 0 0 0 00 1 1
SST
SST1
Store status register ST0
Store status register ST1
1
0
1
1
1
1
0 00M
D
1
0
1
1
1
1
0 01M
D
SSXM
Set sign-extension mode
1
1
1
0
0
1
1 1 0 0 0 0 0 01 1 1
STC
Set test/control flag
1
1
1
0
0
1
1 1 0 0 0 1 1 00 1 1
TRAP
Software interrupt
1
1
1
0
0
1
1 1 0 0 0 0 1 11 1 0
‡ _{This instruction replaces CNFD and CNFP in the SMJ320C25 instruction set.}
Copyright © 2012, Texas Instruments Incorporated
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