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LP38691_15 Datasheet, PDF (19/34 Pages) Texas Instruments – LP3869x/-Q1 500-mA Low-Dropout CMOS Linear Regulators Stable With Ceramic Output Capacitors
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LP38691, LP38693, LP38691-Q1, LP38693-Q1
SNVS321O – JANUARY 2005 – REVISED DECEMBER 2015
10 Power Supply Recommendations
The LP38691 and LP38693 are designed to operate from an input supply voltage range of 2.7 V to 10 V. The
input supply must be well regulated and free of spurious noise. To ensure that the device output voltage is well
regulated, input supply must be at least VOUT + 0.5 V, or 2.7 V, whichever is higher. A minimum capacitor value
of 1-μF is required to be within 1 cm of the IN pin.
11 Layout
11.1 Layout Guidelines
The dynamic performance of the LP38691 or LP38693 is dependent on the layout of the PCB. PCB layout
practices that are adequate for typical LDOs may degrade the load regulation, PSRR, noise, or transient
performance of the LP38691 or LP38693.
Best performance is achieved by placing CIN and COUT on the same side of the PCB as the LP38691 or
LP38693, and as close to the package as is practical. The ground connections for CIN and COUT must be back to
the LP38691 or LP38693 GND pin using as wide, and as short, a copper trace as is practical.
Connections using long trace lengths, narrow trace widths, or connections through vias must be avoided. These
add parasitic inductances and resistance that result in inferior performance especially during transient conditions.
A Ground Plane, either on the opposite side of a two-layer PCB, or embedded in a multi-layer PCB, is strongly
recommended. This Ground Plane serves two purposes:
• Provides a circuit reference plane to assure accuracy.
• Provides a thermal plane to remove heat from the LP38691 or LP38693 WSON package through thermal vias
under the package DAP.
11.2 Layout Example
LP38691DT
COUT
VOUT
Power Ground
OUT
LP38691SD
VIN
CIN
IN 1
6 IN
Power 2
Ground
Thermal
Pad
5 SNS
VIN
IN
N/C 3
4 OUT
space
space
CIN
Figure 30. TO-252 Package
COUT
Figure 31. WSON LP38691 Layout
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