LMC7101BIM5 Datasheet, PDF (19/28 Pages) Texas Instruments – LMC7101/LMC7101Q Tiny Low Power Operational Amplifier with Rail-to-Rail Input and Output

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LMC7101, LMC7101Q
SNOS719F – SEPTEMBER 1999 – REVISED MARCH 2013
An input voltage signal exceeds the LMC7101 power supply voltages with no output phase inversion.
Figure 62. Input Voltage
A ±7.5V input signal greatly exceeds the 3V supply in Figure 64 causing no phase inversion due to R_I.
Figure 63. Input Signal
Applications that exceed this rating must externally limit the maximum input current to ±5 mA with an input
resistor as shown in Figure 64.
Figure 64. R_I Input Current Protection for
Voltages Exceeding the Supply Voltage
RAIL-TO-RAIL OUTPUT
The approximate output resistance of the LMC7101 is 180Ω sourcing and 130Ω sinking at V_S = 3V and 110Ω
sourcing and 80Ω sinking at V_S = 5V. Using the calculated output resistance, maximum output voltage swing can
be estimated as a function of load.
CAPACITIVE LOAD TOLERANCE
The LMC7101 can typically directly drive a 100 pF load with V_S = 15V at unity gain without oscillating. The unity
gain follower is the most sensitive configuration. Direct capacitive loading reduces the phase margin of op amps.
The combination of the op amp's output impedance and the capacitive load induces phase lag. This results in
either an underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 65. This simple
technique is useful for isolating the capacitive input of multiplexers and A/D converters.
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