SN74GTLP1394_15 Datasheet, PDF (18/23 Pages) Texas Instruments – 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY

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PACKAGE MATERIALS INFORMATION
12-Aug-2013
*All dimensions are nominal
Device
SN74GTLP1394DR
SN74GTLP1394PWR
Package Type
SOIC
TSSOP
Package Drawing Pins
D
16
PW
16
SPQ
2500
2000
Length (mm)
333.2
367.0
Width (mm)
345.9
367.0
Height (mm)
28.6
35.0
Pack Materials-Page 2