LM3S1G58 Datasheet, PDF (18/845 Pages) Texas Instruments – Stellaris® LM3S1G58 Microcontroller

Table of Contents
OBSOLETE: TI has discontinued production of this device.
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
Register 33:
Register 34:
Register 35:
Register 36:
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Register 39:
Register 40:
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Register 46:
Register 47:
Register 48:
Register 49:
Register 50:
Register 51:
Register 52:
Register 53:
Register 54:
Interrupt 36-39 Priority (PRI9), offset 0x424 ..................................................................... 115
Interrupt 40-43 Priority (PRI10), offset 0x428 ................................................................... 115
Interrupt 44-47 Priority (PRI11), offset 0x42C ................................................................... 115
Interrupt 48-51 Priority (PRI12), offset 0x430 ................................................................... 115
Interrupt 52-54 Priority (PRI13), offset 0x434 ................................................................... 115
Software Trigger Interrupt (SWTRIG), offset 0xF00 .......................................................... 117
Auxiliary Control (ACTLR), offset 0x008 .......................................................................... 118
CPU ID Base (CPUID), offset 0xD00 ............................................................................... 120
Interrupt Control and State (INTCTRL), offset 0xD04 ........................................................ 121
Vector Table Offset (VTABLE), offset 0xD08 .................................................................... 124
Application Interrupt and Reset Control (APINT), offset 0xD0C ......................................... 125
System Control (SYSCTRL), offset 0xD10 ....................................................................... 127
Configuration and Control (CFGCTRL), offset 0xD14 ....................................................... 129
System Handler Priority 1 (SYSPRI1), offset 0xD18 ......................................................... 131
System Handler Priority 2 (SYSPRI2), offset 0xD1C ........................................................ 132
System Handler Priority 3 (SYSPRI3), offset 0xD20 ......................................................... 133
System Handler Control and State (SYSHNDCTRL), offset 0xD24 .................................... 134
Configurable Fault Status (FAULTSTAT), offset 0xD28 ..................................................... 138
Hard Fault Status (HFAULTSTAT), offset 0xD2C .............................................................. 144
Memory Management Fault Address (MMADDR), offset 0xD34 ........................................ 145
Bus Fault Address (FAULTADDR), offset 0xD38 .............................................................. 146
MPU Type (MPUTYPE), offset 0xD90 ............................................................................. 147
MPU Control (MPUCTRL), offset 0xD94 .......................................................................... 148
MPU Region Number (MPUNUMBER), offset 0xD98 ....................................................... 150
MPU Region Base Address (MPUBASE), offset 0xD9C ................................................... 151
MPU Region Base Address Alias 1 (MPUBASE1), offset 0xDA4 ....................................... 151
MPU Region Base Address Alias 2 (MPUBASE2), offset 0xDAC ...................................... 151
MPU Region Base Address Alias 3 (MPUBASE3), offset 0xDB4 ....................................... 151
MPU Region Attribute and Size (MPUATTR), offset 0xDA0 ............................................... 153
MPU Region Attribute and Size Alias 1 (MPUATTR1), offset 0xDA8 .................................. 153
MPU Region Attribute and Size Alias 2 (MPUATTR2), offset 0xDB0 .................................. 153
MPU Region Attribute and Size Alias 3 (MPUATTR3), offset 0xDB8 .................................. 153
System Control ............................................................................................................................ 168
Register 1: Device Identification 0 (DID0), offset 0x000 ..................................................................... 187
Register 2: Brown-Out Reset Control (PBORCTL), offset 0x030 ........................................................ 189
Register 3: Raw Interrupt Status (RIS), offset 0x050 .......................................................................... 190
Register 4: Interrupt Mask Control (IMC), offset 0x054 ...................................................................... 192
Register 5: Masked Interrupt Status and Clear (MISC), offset 0x058 .................................................. 194
Register 6: Reset Cause (RESC), offset 0x05C ................................................................................ 196
Register 7: Run-Mode Clock Configuration (RCC), offset 0x060 ......................................................... 198
Register 8: XTAL to PLL Translation (PLLCFG), offset 0x064 ............................................................. 202
Register 9: GPIO High-Performance Bus Control (GPIOHBCTL), offset 0x06C ................................... 203
Register 10: Run-Mode Clock Configuration 2 (RCC2), offset 0x070 .................................................... 205
Register 11: Main Oscillator Control (MOSCCTL), offset 0x07C ........................................................... 208
Register 12: Deep Sleep Clock Configuration (DSLPCLKCFG), offset 0x144 ........................................ 209
Register 13: Precision Internal Oscillator Calibration (PIOSCCAL), offset 0x150 ................................... 211
Register 14: Precision Internal Oscillator Statistics (PIOSCSTAT), offset 0x154 .................................... 213
Register 15: Device Identification 1 (DID1), offset 0x004 ..................................................................... 214
18
July 24, 2012
Texas Instruments-Production Data