DRV8841_15 Datasheet, PDF (18/28 Pages) Texas Instruments – Dual H-Bridge Driver IC

DRV8841
SLVSAC0F – MAY 2010 – REVISED DECEMBER 2015
10 Layout
www.ti.com
10.1 Layout Guidelines
The VMA and VMB pins should be bypassed to GND using low-ESR ceramic bypass capacitors with a
recommended value of 0.1-μF rated for VMx. This capacitor should be placed as close to the VMA and VMB pins
as possible with a thick trace or ground plane connection to the device GND pin.
The VMA and VMB pins must be bypassed to ground using an appropriate bulk capacitor. This component may
be an electrolytic and should be located close to the DRV8841.
A low-ESR ceramic capacitor must be placed in between the CPL and CPH pins. TI recommends a value of
0.01-μF rated for VMx. Place this component as close to the pins as possible.
A low-ESR ceramic capacitor must be placed in between the VMA and VCP pins. TI recommends a value of
0.1-μF rated for 16 V. Place this component as close to the pins as possible. Also, place a 1-MΩ resistor
between VCP and VMA.
Bypass V3P3 to ground with a ceramic capacitor rated 6.3 V. Place this bypass capacitor as close to the pin as
possible
10.2 Layout Example
0.1 µF
0.01 µF
1 0Ÿ
0.1 µF
R_ISENA
R_ISENB
0.1 µF
CP1
CP2
VCP
VMA
AOUT1
ISENA
AOUT2
BOUT2
ISENB
BOUT1
VMB
AVREF
BVREF
GND
GND
BI1
BI0
AI1
AI0
BIN2
BIN1
AIN1
AIN2
DECAY
nFAULT
nSLEEP
nRESET
V3P3OUT
0.47 µF
Figure 11. Layout Recommendation
10.3 Thermal Considerations
The DRV8841 has thermal shutdown (TSD) as described in Thermal Shutdown (TSD). If the die temperature
exceeds approximately 150°C, the device will be disabled until the temperature drops to a safe level.
Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient
heatsinking, or too high an ambient temperature.
18
Submit Documentation Feedback
Product Folder Links: DRV8841
Copyright © 2010–2015, Texas Instruments Incorporated