CDCLVP111-SP Datasheet, PDF (18/23 Pages) Texas Instruments – Low-Voltage 1:10 LVPECL With Selectable Input Clock Driver

CDCLVP111-SP
SCAS946 – NOVEMBER 2016
9 Power Supply Recommendations
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9.1 Power-Supply Filtering
High-performance clock buffers are sensitive to noise on the power supply, which can dramatically increase the
additive jitter of the buffer. Thus, it is essential to reduce noise from the system power supply, especially when
jitter and phase noise are very critical to applications.
Filter capacitors are used to eliminate the low-frequency noise from the power supply, where the bypass
capacitors provide the very low-impedance path for high-frequency noise and guard the power-supply system
against the induced fluctuations. These bypass capacitors also provide instantaneous current surges as required
by the device and should have low equivalent series resistance (ESR). To properly use the bypass capacitors,
they must be placed very close to the power-supply terminals and laid out with short loops to minimize
inductance. TI recommends to add as many high-frequency (for example, 0.1-μF) bypass capacitors as there are
supply terminals in the package.
TI recommends, but does not require, to insert a ferrite bead between the board power supply and the chip
power supply that isolates the high-frequency switching noises generated by the clock driver; these beads
prevent the switching noise from leaking into the board supply. It is imperative to choose an appropriate ferrite
bead with very low DC resistance to provide adequate isolation between the board supply and the chip supply,
as well as to maintain a voltage at the supply terminals that is greater than the minimum voltage required for
proper operation.
Figure 16 illustrates this recommended power-supply decoupling method.
Board
V_CC
Supply
Ferrite Bead
Chip
Supply
C
10 mF
C
1 mF
C
0.1 mF (x3)
Figure 16. Power-Supply Decoupling
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