AFE7071_13 Datasheet, PDF (18/36 Pages) Texas Instruments – Dual 14-Bit 65-MSPS Digital-to-Analog Converter With Integrated Analog Quadrature Modulator

AFE7071
SLOS789C – MAY 2012 – REVISED JANUARY 2012
Register name: CONFIG1; Address: 0x01
BIT 7
twos
0
iqswap
0
Reserved
0
1
daca_complement
0
dacb_complement
0
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BIT 0
Reserved
X
X
twos:
iqswap:
daca_complement:
dacb_complement:
When asserted, the input to the chip is 2s complement, otherwise offset binary.
When asserted, the DACA data is driven onto DACB and reverse.
When asserted, the output to DACA is complemented. This allows the user of the chip
effectively to change the + and – designations of the PADs.
When asserted, the output to DACB is complemented. This allows the user of the chip
effectively to change the + and – designations of the PADs.
18
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