TMS320C6678_13 Datasheet, PDF (177/242 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

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Table 7-41
TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691D—April 2013
CIC2 Event Inputs (Secondary Events for EDMA3CC1 and EDMA3CC2) (Part 2 of 4)
Input Event # on CIC System Interrupt
Description
44
MISC_INTR
Network coprocessor MISC interrupt
45
TRACER_CORE_0_INTD
Tracer sliding time window interrupt for individual core
46
TRACER_CORE_1_INTD
Tracer sliding time window interrupt for individual core
47
TRACER_CORE_2_INTD
Tracer sliding time window interrupt for individual core
48
TRACER_CORE_3_INTD
Tracer sliding time window interrupt for individual core
49
TRACER_DDR_INTD
Tracer sliding time window interrupt for DDR3 EMIF
50
TRACER_MSMC_0_INTD
Tracer sliding time window interrupt for MSMC SRAM bank0
51
TRACER_MSMC_1_INTD
Tracer sliding time window interrupt for MSMC SRAM bank1
52
TRACER_MSMC_2_INTD
Tracer sliding time window interrupt for MSMC SRAM bank2
53
TRACER_MSMC_3_INTD
Tracer sliding time window interrupt for MSMC SRAM bank3
54
TRACER_CFG_INTD
Tracer sliding time window interrupt for CFG0 TeraNet
55
TRACER_QM_CFG_INTD
Tracer sliding time window interrupt for QM_SS CFG
56
TRACER_QM_DMA_INTD
Tracer sliding time window interrupt for QM_SS slave port
57
TRACER_SM_INTD
Tracer sliding time window interrupt for semaphore
58
SEMERR0
Semaphore interrupt
59
SEMERR1
Semaphore interrupt
60
SEMERR2
Semaphore interrupt
61
SEMERR3
Semaphore interrupt
62
BOOTCFG_INTD
BOOTCFG interrupt BOOTCFG_ERR and BOOTCFG_PROT
63
PASS_INT_PKTDMA_0
Network coprocessor interrupt for packet DMA starvation
64
MPU0_INTD (MPU0_ADDR_ERR_INT and
MPU0 addressing violation interrupt and protection violation interrupt.
MPU0_PROT_ERR_INT combined)
65
MSMC_scrub_cerror
Correctable (1-bit) soft error detected during scrub cycle
66
MPU1_INTD (MPU1_ADDR_ERR_INT and
MPU1 addressing violation interrupt and protection violation interrupt.
MPU1_PROT_ERR_INT combined)
67
RapidIO_INT_PKTDMA_0
RapidIO interrupt for packet DMA starvation
68
MPU2_INTD (MPU2_ADDR_ERR_INT and
MPU2 addressing violation interrupt and protection violation interrupt.
MPU2_PROT_ERR_INT combined)
69
QM_INT_PKTDMA_0
QM interrupt for packet DMA starvation
70
MPU3_INTD (MPU3_ADDR_ERR_INT and
MPU3 addressing violation interrupt and protection violation interrupt.
MPU3_PROT_ERR_INT combined)
71
QM_INT_PKTDMA_1
QM interrupt for packet DMA starvation
72
MSMC_dedc_cerror
Correctable (1-bit) soft error detected on SRAM read
73
MSMC_dedc_nc_error
Non-correctable (2-bit) soft error detected on SRAM read
74
MSMC_scrub_nc_error
Non-correctable (2-bit) soft error detected during scrub cycle
75
Reserved
76
MSMC_mpf_error0
Memory protection fault indicators for each system master PrivID
77
MSMC_mpf_error1
Memory protection fault indicators for each system master PrivID
78
MSMC_mpf_error2
Memory protection fault indicators for each system master PrivID
79
MSMC_mpf_error3
Memory protection fault indicators for each system master PrivID
80
MSMC_mpf_error4
Memory protection fault indicators for each system master PrivID
81
MSMC_mpf_error5
Memory protection fault indicators for each system master PrivID
82
MSMC_mpf_error6
Memory protection fault indicators for each system master PrivID
83
MSMC_mpf_error7
Memory protection fault indicators for each system master PrivID
84
MSMC_mpf_error8
Memory protection fault indicators for each system master PrivID
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Peripheral Information and Electrical Specifications 177