TRF6901_08 Datasheet, PDF (17/32 Pages) Texas Instruments – SINGLE-CHIP RF TRANSCEIVER

TRF6901
SINGLEĆCHIP RF TRANSCEIVER
SLWS110G − SEPTEMBER 2001 − REVISED JUNE 2004
PRINCIPLES OF OPERATION
register description
23 22
Word Address
A 00
B 01
C 10
D 11
21 20 19 18 17 16 15
Main AĆDivider Coefficient
(Mode 0)
Main AĆDivider Coefficient
(Mode 1)
Reference Divider Coefficient
0 00
XTAL_Tune
PFD
reset
14 13 12 11 10 9 8
Main BĆDivider Coefficient (Mode 0)
Main BĆDivider Coefficient (Mode 1)
0
Buffer Clock Divider Coefficient
Dem_Tune
0000
7
65 4 321
0
PA
PA
0
0
0
TX/
RX
0
CP Acc. 0
TX/
RX
FSK/
OOK
Buf
Detector
Threshold
dcĆdc Clock Divider Coefficient
0 0 000
dcĆdc
0
0
ADDRESS
00
00
00
00
00
00
00
01
01
01
01
01
01
01
10
10
10
11
11
11
21 : 17
16 : 8
7:6
5
3:2
1
0
21 : 17
16 : 8
7:6
5
4
3
2:1
21 : 14
12 : 8
6:0
18 : 16
15
14 : 12
BITS
5
9
2
1
2
1
1
5
9
2
1
1
1
2
8
5
7
3
1
3
DESCRIPTION
Main A-divider coefficient (Mode 0)
Main B-divider coefficient (Mode 0)
Controls the PA attenuation (Mode 0)
Enables transmit/receive path (Mode 0)
Controls the charge pump peak current
Set to 0
Enables the dc-dc converter
Main A-divider coefficient (Mode 1)
Main B-divider coefficient (Mode 1)
Controls the PA attenuation (Mode 1)
Enables transmit/receive path (Mode 1)
Controls modulation scheme (FSK or OOK)
Enables the XTAL output buffer
Sets threshold for the brownout detector
Reference divider coefficient
Buffer clock divider coefficient (K-divider)
DC-DC converter clock divider coefficient (L-divider)
Tunes the XTAL frequency by using an internal capacitor
bank
PFD reset
Tunes the resonant frequency of the external
demodulation tank circuit
At power on/startup, all of the TRF6901 register contents are zero, with the exception of the power amplifier
attenuation registers and the phase-frequency detector reset register. The power amplifier attenuation registers
are set to zero attenuation, i.e., A<7:6>=10 and B<7:6>=10. The PFD reset register is set to the prescaler
setting, i.e., D<15>=1.
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