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TPS51116-EP Datasheet, PDF (17/38 Pages) Texas Instruments – COMPLETE DDR, DDR2, DDR3, AND LPDDR3 MEMORY POWER SOLUTION SYNCHRONOUS BUCK CONTROLLER, 1-A LDO, BUFFERED REFERENCE
TPS51116-EP
www.ti.com
SLUSB52A – OCTOBER 2012 – REVISED NOVEMBER 2012
APPLICATION INFORMATION
Loop Compensation and External Parts Selection
Current Mode Operation
A buck converter using TPS51116 current mode operation can be partitioned into three portions, a voltage
divider, an error amplifier and a switching modulator. By linearizing the switching modulator, we can derive the
transfer function of the whole system. Because current mode scheme directly controls the inductor current, the
modulator can be linearized as shown in Figure 4.
Figure 4. Linearizing the Modulator
Here, the inductor is located inside the local feedback loop and its inductance does not appear in the small signal
model. As a result, a modulated current source including the power inductor can be modeled as a current source
with its transconductance of 1/RS and the output capacitor represent the modulator portion. This simplified model
is applicable in the frequency space up to approximately a half of the switching frequency. One note is, although
the inductance has no influence to small signal model, it has influence to the large signal model as it limits slew
rate of the current source. This means the buck converter’s load transient response, one of the large signal
behaviors, can be improved by using smaller inductance without affecting the loop stability.
Total open loop transfer function of the whole system is given by Equation 6.
H(s) + H1(s) H2(s) H3(s)
(6)
Assuming RL>>ESR, RO>>RC and CC>>CC2, each transfer function of the three blocks is shown starting with
Equation 7.
H1(s)
+
R2
(R2 ) R1)
(7)
H2(s) + * gm
RO ǒ1 ) s CC RCǓ
ǒ1 ) s CC ROǓ ǒ1 ) s CC2
RCǓ
(8)
H3(s)
+
(1 ) s
ǒ1 ) s
CO
CO
ESR)
RLǓ
RL
RS
(9)
There are three poles and two zeros in H(s). Each pole and zero is given by the following five equations.
wP1 + ǒCC 1 ROǓ
(10)
wP2 + ǒCO 1 RLǓ
(11)
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