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SN74VMEH22501A-EP Datasheet, PDF (17/27 Pages) Texas Instruments – 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3-STATE OUTPUTS
SN74VMEH22501AĆEP
8ĆBIT UNIVERSAL BUS TRANSCEIVER AND TWO 1ĆBIT BUS TRANSCEIVERS
WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3ĆSTATE OUTPUTS
SCES625 − FEBRUARY 2005
driver in slot 1, with one receiver in slot 21 (minimum load) (continued)
skew characteristics for UBT for specific worst-case VCC and temperature within the recommended
ranges of supply voltage and operating free-air temperature (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN TYP† MAX UNIT
tsk(LH)
3A
3B
tsk(HL)
2
ns
2.3
tsk(LH)
CLKAB
3B
tsk(HL)
2.1
ns
2.4
3A
3B
tsk(t)‡
CLKAB
3B
1
ns
1
tsk(pp)
3A
CLKAB
3B
0.2 2.5
ns
3B
0.2 2.9
† All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
‡ tsk(t) − Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same
packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions,
both low to high (LH) and high to low (HL) [tsk(t)].
By simulating the performance of the device using the VME64x backplane (see Figure 3), the maximum peak current
in or out of the B-port output, as the devices switch from one logic state to another, was found to be equivalent to
driving the lumped load shown in Figure 4.
5V
From Output
Under Test
165 Ω
235 Ω
390 pF
LOAD CIRCUIT
Figure 4. Equivalent AC Peak Output-Current Lumped Load
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