PGA308_16 Datasheet, PDF (17/30 Pages) Texas Instruments – Programmable Gain and Offset

PGA308
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Timeout on the One-Wire Interface
The PGA308 includes a timeout mechanism. If
synchronization between the controller and the
PGA308 is lost for any reason, the timeout
mechanism allows the One-Wire interface to reset
communication. The timeout period is set to
approximately 28ms (typical). If the timeout period
expires between the initialization byte and the
command byte, between the command byte and any
data byte, or between any data bytes, the PGA308
resets the One-Wire interface circuitry so that it
expects an initialization byte. Every time that a byte is
transmitted on the single wire interface, this timeout
period restarts.
POWER-ON SEQUENCE
The PGA308 provides circuitry to detect when the
power supply is applied to the PGA308 and resets
the internal registers to a known power-on reset
(POR) state. This reset also occurs whenever the
supply is invalid so that the PGA308 is set to a known
state when the supply becomes valid again. The
threshold for this circuit is approximately 1.7V to
2.1V. After the power supply becomes valid, the
PGA308 waits for approximately 25ms, during which
V_OUT is disabled, and then attempts to read the data
from the last valid OTP memory bank. If the memory
bank has the proper checksum, then the PGA308
RAM is loaded with the OTP data and V_OUT enabled.
If the checksum is invalid, V_OUT is set to disabled.
Unless disabled by the OWD bit in Configuration
Register 2 (CFG2), the One-Wire interface can
always communicate to the PGA308 and override the
contents of the current RAM in use by setting the
appropriate SWL[2:0] bits in the Software Control
Register (SFTC). For applications that require
instant-on for V_OUT, the NOW bit in the CFG2 register
can be set to '1', which eliminates the 25ms disable
of V_OUT on power-up.
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SBOS440B – JULY 2008 – REVISED DECEMBER 2010
ONE-WIRE OPERATION WITH 1W
CONNECTED TO V_OUT
In some sensor applications, it is desired to provide
the end user of the sensor module with three pins:
V_S, GND, and Sensor Out. It is also desired in these
applications to digitally calibrate the sensor module
after its final assembly of sensor and electronics. The
PGA308 has a mode that allows the One-Wire
interface pin (1W) to be tied directly to the PGA308
output pin (V_OUT).
To calibrate the PGA308 in Three-Wire configuration,
program the internal registers and measure the
resulting V_OUT. To do this while V_OUT is connected to
1W requires the ability to enable and disable V_OUT.
Thus, the 1W/V_OUT line operates in a multiplexed
mode where 1W is used as a bidirectional digital
interface while V_OUT is disabled, and V_OUT drives the
line as a conditioned sensor output voltage when it is
enabled.
The PGA308 also provides a mode in which the
output amplifier can be enabled for a set time period
and then disabled again to allow sharing of the 1W
pin with the V_OUT connection. This action is
accomplished by writing a value to bits OEN[7:0] in
the One-Wire Enable Control register (OENC). Any
non-zero value enables the output. This non-zero
value is decremented every 10ms until it becomes
zero. When this value becomes zero, V_OUT is
disabled and a 1s timeout begins waiting for bus
activity on the digital interface (1W pin). As long as
there is activity on the 1W pin, the 1s timeout is
continually reset. After 1s of no bus activity, the
PGA308 checks for a correct checksum. If the
checksum is correct, the PGA308 runs with the
values that currently exist in RAM. If the checksum is
not valid, the PGA308 checks for written bank select
registers in OTP in the order of BANK SEL4, BANK
SEL3, BANK SEL2 then BANK SEL1. The highest
bank select register containing valid programmed
data is read. The value read from this register points
to one of the seven OTP banks, which is then loaded
into RAM.
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