OPA694 Datasheet, PDF (17/28 Pages) Burr-Brown (TI) – Wideband, Low-Power, Current Feedback Operational Amplifier

OPA694
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requirement for the circuit in Figure 41. Perfect
cancellation over process and temperature is not
possible. However, this initial resistor setting and
precise gain matching will minimize long-term pulse
settling tails.
THERMAL ANALYSIS
Due to the high output power capability of the
OPA694, heatsinking or forced airflow may be
required under extreme operating conditions.
Maximum desired junction temperature will set the
maximum allowed internal power dissipation, as
described below. In no case should the maximum
junction temperature be allowed to exceed +150°C.
Operating junction temperature (T_J) is given by T_A +
P_D × q_JA. The total internal power dissipation (P_D) is
the sum of quiescent power (P_DQ) and additional
power dissipated in the output stage (P_DL) to deliver
load power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. P_DL will depend on the required
output signal and load but would, for a grounded
resistive load, be at a maximum when the output is
fixed at a voltage equal to 1/2 either supply voltage
(for equal bipolar supplies). Under this condition P_DL
= V_S ²/(4 × R_L) where R_L includes feedback network
loading.
Note that it is the power in the output stage and not in
the load that determines internal power dissipation.
As a worst-case example, compute the maximum T_J
using an OPA694IDBV (SOT23-5 package) in the
circuit of Figure 31 operating at the maximum
specified ambient temperature of +85°C and driving a
grounded 20Ω load to +2.5V DC:
P_D = 10V × 6.0mA + 5²/[4 × (20Ω || 804Ω)] = 380mΩ
Maximum T_J = +85°C + (0.38W × (150°C/W) = 142°C
Although this is still below the specified maximum
junction temperature, system reliability considerations
may require lower junction temperatures. Remember,
this is a worst-case internal power dissipation—use
your actual signal and load to compute P_DL. The
highest possible internal dissipation will occur if the
load requires current to be forced into the output for
positive output voltages or sourced from the output
for negative output voltages. This puts a high current
through a large internal voltage drop in the output
transistors. The Output Voltage and Current
Limitations plot (Figure 21) shown in the Typical
Characteristics includes a boundary for 1W maximum
internal power dissipation under these conditions.
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SBOS319G – SEPTEMBER 2004 – REVISED JANUARY 2010
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a
high-frequency amplifier like the OPA694 requires
careful attention to board layout parasitics and
external component types. Recommendations that
will optimize performance include:
a) Minimize parasitic capacitance to any AC ground
for all of the signal I/O pins. Parasitic capacitance on
the output and inverting input pins can cause
instability: on the noninverting input, it can react with
the source impedance to cause unintentional
bandlimiting. To reduce unwanted capacitance, a
window around the signal I/O pins should be opened
in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be
unbroken elsewhere on the board.
b) Minimize the distance (< 0.25in, or 0.635cm)
from the power-supply pins to high-frequency 0.1mF
decoupling capacitors. At the device pins, the ground
and power plane layout should not be in close
proximity to the signal I/O pins. Avoid narrow power
and ground traces to minimize inductance between
the pins and the decoupling capacitors. The
power-supply connections (on pins 4 and 7) should
always be decoupled with these capacitors. An
optional supply decoupling capacitor across the two
power supplies (for bipolar operation) will improve
2nd-harmonic distortion performance. Larger (2.2mF
to 6.8mF) decoupling capacitors, effective at lower
frequencies, should also be used on the main supply
pins. These may be placed somewhat farther from
the device and may be shared among several
devices in the same area of the PCB.
c) Careful selection and placement of external
components will preserve the high-frequency
performance of the OPA694. Resistors should be a
very low reactance type. Surface-mount resistors
work best and allow a tighter overall layout. Metal-film
and carbon composition, axially-leaded resistors can
also provide good high-frequency performance.
Again, keep their leads and PCB trace length as short
as possible. Never use wirewound type resistors in a
high-frequency application. Since the output pin and
inverting input pin are the most sensitive to parasitic
capacitance, always position the feedback and series
output resistor, if any, as close as possible to the
output pin. Other network components, such as
noninverting input termination resistors, should also
be placed close to the package. Where double-side
component mounting is allowed, place the feedback
resistor directly under the package on the other side
of the board between the output and inverting input
pins. The frequency response is primarily determined
by the feedback resistor value, as described
previously. Increasing its value will reduce the
bandwidth, while decreasing it will give a more
peaked frequency response. The 402Ω feedback
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