LMZ23608 Datasheet, PDF (17/26 Pages) Texas Instruments – 8A SIMPLE SWITCHER® Power Module with 36V Maximum Input Voltage and Current Sharing

Note that the stability requirement for minimum output capac-
itance must always be met.
One recommended output capacitor combination is two
330μF, 15 mOhm ESR tantalum polymer capacitors connect-
ed in parallel with a 47 uF 6.3V X5R ceramic. This combina-
tion provides excellent performance that may exceed the
requirements of certain applications. Additionally some small
47nF ceramic capacitors can be used for high frequency EMI
suppression.
C_IN SELECTION
The LMZ23608 module contains two internal ceramic input
capacitors. Additional input capacitance is required external
to the module to handle the input ripple current of the appli-
cation. The input capacitor can be several capacitors in par-
allel. This input capacitance should be located in very close
proximity to the module. Input capacitor selection is generally
directed to satisfy the input ripple current requirements rather
than by capacitance value. Input ripple current rating is dic-
tated by the equation:
(10)
where D ≊ V_OUT / V_IN
(As a point of reference, the worst case ripple current will oc-
cur when the module is presented with full load current and
when V_IN = 2 * V_OUT).
Recommended minimum input capacitance is 30 uF X7R (or
X5R) ceramic with a voltage rating at least 25% higher than
the maximum applied input voltage for the application. It is
also recommended that attention be paid to the voltage and
temperature derating of the capacitor selected. It should be
noted that ripple current rating of ceramic capacitors may be
missing from the capacitor data sheet and you may have to
contact the capacitor manufacturer for this parameter.
If the system design requires a certain minimum value of
peak-to-peak input ripple voltage (ΔV_IN) to be maintained then
the following equation may be used.
For the design case of V_IN = 12V, V_OUT = 3.3V, I_OUT = 8A, and
T_A-MAX = 50°C, the module must see a thermal resistance
from case to ambient (θ_CA) of less than:
(13)
Given the typical thermal resistance from junction to case
(θ_JC) to be 1.0 °C/W. Use the 85°C power dissipation curves
in the Typical Performance Characteristics section to esti-
mate the P_IC-LOSS for the application being designed. In this
application it is 3.9W.
(14)
To reach θ_CA = 18.23, the PCB is required to dissipate heat
effectively. With no airflow and no external heat-sink, a good
estimate of the required board area covered by 2 oz. copper
on both the top and bottom metal layers is:
(15)
As a result, approximately 27.42 square cm of 2 oz copper on
top and bottom layers is the minimum required area for the
example PCB design. This is 5.23 x 5.23 cm (2.06 x 2.06 in)
square. The PCB copper heat sink must be connected to the
exposed pad. For best performance, use approximately 100,
12mil (305 μm) thermal vias spaced 59 mil (1.5 mm) apart
connect the top copper to the bottom copper.
Another way to estimate the temperature rise of a design is
using θ_JA. An estimate of θ_JA for varying heat sinking copper
areas and airflows can be found in the typical applications
curves. If our design required the same operating conditions
as before but had 225 LFPM of airflow. We locate the required
θ_JA of
(11)
If ΔV_IN is 200 mV or 1.66% of V_IN for a 12V input to 3.3V output
application and f_SW = 350 kHz then:
(12)
Additional bulk capacitance with higher ESR may be required
to damp any resonant effects of the input capacitance and
parasitic inductance of the incoming supply lines. The
LMZ23608 typical applications schematic and evaluation
board include a 150 μF 50V aluminum capacitor for this func-
tion. There are many situations where this capacitor is not
necessary.
POWER DISSIPATION AND BOARD THERMAL
REQUIREMENTS
When calculating module dissipation use the maximum input
voltage and the average output current for the application.
Many common operating conditions are provided in the char-
acteristic curves such that less common applications can be
derived through interpolation. In all designs, the junction tem-
perature must be kept below the rated maximum of 125°C.
(16)
On the Theta JA vs copper heatsinking curve, the copper area
required for this application is now only 1 square inches. The
airflow reduced the required heat sinking area by a factor of
four.
To reduce the heat sinking copper area further, this package
is compatable with D3-PAK surface mount heat sinks.
For an example of a high thermal performance PCB layout for
SIMPLE SWITCHER© power modules, refer to AN-2093,
AN-2084, AN-2125, AN-2020 and AN-2026.
PC BOARD LAYOUT GUIDELINES
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce and resistive voltage drop in the traces. These
can send erroneous signals to the DC-DC converter resulting
in poor regulation or instability. Good layout can be imple-
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