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DIR9001IPWRQ1G4 Datasheet, PDF (17/35 Pages) Texas Instruments – 96-kHz, 24-Bit Digital Audio Interface Receiver
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DIR9001-Q1
SLLS843A – JUNE 2007 – REVISED FEBRUARY 2008
DATA DESCRIPTION
Decoded Serial Audio Data Output and Interface Format
The DIR9001-Q1 supports following 4-data formats for the decoded data.
• 16-bit, MSB-first, right-justified
• 24-bit, MSB-first, right-justified
• 24-bit, MSB-first, left-justified
• 24-bit, MSB-first, I2S
Decoded data is MSB first and 2s-complement in all formats.
The decoded data is provided through the DOUT pin.
The format of the decoded data is selected by the FMT[1:0] pins.
The data formats for each FMT[1:0] pin setting are shown in Table 7.
Table 7. Serial Audio Data Output Format Set by FMT[1:0]
FMT[1:0] SETTINGS
FMT1
FMT0
L
L
L
H
H
L
H
H
DOUT SERIAL AUDIO DATA OUTPUT FORMAT
16-bit, MSB-first, right-justified
24-bit, MSB-first, right-justified
24-bit MSB-first, left-justified
24-bit, MSB-first, I2S
Biphase Signal (IN)
BFRAME (OUT)
B
0L
W
0R
M
1L
W
1R
tLATE
LRCKO (OUT)
2
(I S)
LRCKO (OUT)
2
(Except I S)
DOUT (OUT)
0L
0R
1L
1R
17 BCK
tLATE
LRCKO/DOUT latency
PARAMETERS
MIN
TYP
3/fS
Figure 10. Latency Time Between Biphase Input and LRCKO/DOUT
MAX
UNIT
s
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s) :DIR9001-Q1
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