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BQ24004_12 Datasheet, PDF (17/27 Pages) Texas Instruments – TWO-CELL Li-ION CHARGE MANAGEMENT IC
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THERMAL INFORMATION
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
THERMALLY ENHANCED TSSOP-20
The thermally enhanced PWP package is based on
the 20-pin TSSOP, but includes a thermal pad
(seeFigure 20) to provide an effective thermal contact
between the IC and the PWB.
Traditionally, surface mount and power have been
mutually exclusive terms. A variety of scaled-down
TO220-type packages have leads formed as gull
wings to make them applicable for surface-mount
applications. These packages, however, suffer from
several shortcomings: they do not address the very
low profile requirements (<2 mm) of many of today's
advanced systems, and they do not offer a pin-count
high enough to accommodate increasing integration.
On the other hand, traditional low-power surface-
mount packages require power-dissipation derating
that severely limits the usable range of many high-
performance analog circuits.
The PWP package (thermally enhanced TSSOP)
combines fine-pitch surface-mount technology with
thermal performance comparable to much larger
power packages.
The PWP package is designed to optimize the heat
transfer to the PWB. Because of the very small size
and limited mass of a TSSOP package, thermal
enhancement is achieved by improving the thermal
conduction paths that remove heat from the
component. The thermal pad is formed using a lead-
frame design (patent pending) and manufacturing
technique to provide the user with direct connection
to the heat-generating IC. When this pad is soldered
or otherwise coupled to an external heat dissipator,
high power dissipation in the ultrathin, fine-pitch,
surface-mount package can be reliably achieved.
DIE
Side View (a)
DIE
End View (b)
Thermal
Pad
Bottom View (c)
Figure 20. Views of Thermally Enhanced
PWP Package
Because the conduction path has been enhanced,
power-dissipation capability is determined by the
thermal considerations in the PWB design. For
example, simply adding a localized copper plane
(heat-sink surface), which is coupled to the thermal
pad, enables the PWP package to dissipate 2.5 W in
free air. (Reference Figure 22(a),8 cm2 of copper
heat sink and natural convection.) Increasing the
heat-sink size increases the power dissipation range
for the component. The power dissipation limit can be
further improved by adding airflow to a PWB/IC
assembly. (See Figure 22(b) and Figure 22(c).) The
line drawn at 0.3 cm2 in Figure 21 and Figure 22
indicates performance at the minimum recommended
heat-sink size.
Copyright © 2000–2012, Texas Instruments Incorporated
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