ADS5463-EP Datasheet, PDF (17/33 Pages) Texas Instruments – 12-BIT, 500-MSPS ANALOG-TO-DIGITAL CONVERTER

ADS5463-EP
www.ti.com ......................................................................................................................................... SGLS382C – NOVEMBER 2006 – REVISED OCTOBER 2009
TYPICAL CHARACTERISTICS (continued)
Typical plots at T_A = 25°C, sampling rate = 500 MSPS, 50% clock duty cycle, AVDD5 = 5 V, AVDD3 = 3.3 V, DVDD3 = 3.3 V,
and 3 V_PP differential clock, (unless otherwise noted)
SFDR
vs
CLOCK LEVEL
SNR
vs
CLOCK LEVEL
80
66.0
79
f_IN = 100 MHz
78
77
f_IN = 300 MHz
76
65.5
65.0
64.5
f_IN = 100 MHz
f_IN = 300 MHz
75
74
73
72
71
0
f_S = 500 MSPS
1
2
3
4
Clock Amplitude − V_P−P
Figure 24.
5
G022
64.0
63.5
63.0
62.5
0
f_S = 500 MSPS
1
2
3
4
Clock Amplitude − V_P−P
Figure 25.
5
G023
SFDR
vs
CLOCK COMMON MODE
85
80
f_IN = 100 MHz
f_IN = 300 MHz
75
70
SNR
vs
CLOCK COMMON MODE
66
f_IN = 100 MHz
65
f_IN = 300 MHz
64
63
62
65
f_S = 500 MSPS
60
0
1
2
3
4
Clock Common Mode − V
Figure 26.
5
G024
61
f_S = 500 MSPS
60
0
1
2
3
4
Clock Common Mode − V
Figure 27.
5
G025
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