TMS320C6672 Datasheet, PDF (164/228 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
Table 7-39 CIC0 Event Inputs (Secondary Interrupts for C66x CorePacs) (Part 4 of 4)
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Input Event# on CIC
126
127
128
System Interrupt
INTDST14
INTDST15
EASYNCERR
Description
RapidIO interrupt
RapidIO interrupt
EMIF16 error interrupt
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
End of Table 7-39
Reserved
Reserved
Reserved
Reserved
QM_INT_PKTDMA_0
QM_INT_PKTDMA_1
RapidIO_INT_PKTDMA_0
PASS_INT_PKTDMA_0
SmartReflex_intrreq0
SmartReflex_intrreq1
SmartReflex_intrreq2
SmartReflex_intrreq3
VPNoSMPSAck
VPEqValue
VPMaxVdd
VPMinVdd
VPINIDLE
VPOPPChangeDone
Reserved
UARTINT
URXEVT
UTXEVT
QM_INT_PASS_TXQ_PEND_17
QM_INT_PASS_TXQ_PEND_18
QM_INT_PASS_TXQ_PEND_19
QM_INT_PASS_TXQ_PEND_20
QM_INT_PASS_TXQ_PEND_21
QM_INT_PASS_TXQ_PEND_22
QM_INT_PASS_TXQ_PEND_23
QM_INT_PASS_TXQ_PEND_24
QM_INT_PASS_TXQ_PEND_25
Queue manager Interrupt for packet DMA starvation
Queue manager Interrupt for packet DMA starvation
RapidIO Interrupt for packet DMA starvation
Network coprocessor Interrupt for packet DMA starvation
SmartReflex sensor interrupt
SmartReflex sensor interrupt
SmartReflex sensor interrupt
SmartReflex sensor interrupt
VPVOLTUPDATE has been asserted but SMPS has not been responded to in a
defined time interval
SRSINTERUPTZ is asserted, but the new voltage is not different from the
current SMPS voltage
The new voltage required is equal to or greater than MaxVdd.
The new voltage required is equal to or less than MinVdd.
The FSM of Voltage processor is in idle.
The average frequency error is within the desired limit.
UART interrupt
UART receive event
UART transmit event
Queue manager pend event
Queue manager pend event
Queue manager pend event
Queue manager pend event
Queue manager pend event
Queue manager pend event
Queue manager pend event
Queue manager pend event
Queue manager pend event
Table 7-40 CIC2 Event Inputs (Secondary Events for EDMA3CC1 and EDMA3CC2) (Part 1 of 5)
Input Event # on CIC System Interrupt
Description
0
GPINT8
GPIO interrupt
1
GPINT9
GPIO interrupt
2
GPINT10
GPIO interrupt
3
GPINT11
GPIO interrupt
164 Peripheral Information and Electrical Specifications
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