THS3062DGNR Datasheet, PDF (16/33 Pages) Texas Instruments – LOW-DISTORTION, HIGH SLEW RATE, CURRENT-FEEDBACK AMPLIFIERS

THS3061
THS3062
SLOS394B – JULY 2002 – REVISED NOVEMBER 2009
leadframe upon which the die is mounted [see
Figure 50(a) and Figure 50(b)]. This arrangement
results in the lead frame being exposed as a thermal
pad on the underside of the package [see
Figure 50(c)]. Because this thermal pad has direct
thermal contact with the die, excellent thermal
performance can be achieved by providing a good
thermal path away from the thermal pad.
The PowerPAD package allows for both assembly
and thermal management in one manufacturing
operation. During the surface-mount solder operation
(when the leads are being soldered), the thermal pad
can also be soldered to a copper area underneath the
package. Through the use of thermal paths within this
copper area, heat can be conducted away from the
package into either a ground plane or other heat
dissipating device.
The PowerPAD package represents a breakthrough
in combining the small area and ease of assembly of
surface mount, compared with awkward mechanical
methods of heatsinking.
DIE
Side View (a)
DIE
End View (b)
Thermal
Pad
Bottom View (c)
Figure 50. Views of Thermally Enhanced Package
Although there are many ways to properly heatsink
the PowerPAD package, the following steps illustrate
the recommended approach.
PowerPAD PCB LAYOUT CONSIDERATIONS
1. Prepare the PCB with a top-side etch pattern as
shown in Figure 51. There should be etch for the
leads as well as etch for the thermal pad.
Pin 1
0.030
0.075
0.205
0.060
0.013
www.ti.com
0.017
0.025 0.094
0.010
vias
0.035
Top View
0.040
Figure 51. DGN PowerPAD PCB Etch
and Via Pattern
2. Place five holes in the area of the thermal pad.
These holes should be 10 mils in diameter. Keep
them small so that solder wicking through the
holes is not a problem during reflow.
3. Additional vias may be placed anywhere along
the thermal plane outside of the thermal pad
area. This helps dissipate the heat generated by
the THS306x-family IC. These additional vias
may be larger than the 10-mil diameter vias
directly under the thermal pad. They can be
larger because they are not in the thermal pad
area to be soldered, so wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground
plane, do not use the typical web or spoke via
connection methodology. Web connections have
a high thermal resistance that is useful for
slowing the heat transfer during soldering
operations, making the soldering of vias that have
plane connections easier. In this application,
however, low thermal resistance is desired for the
most efficient heat transfer. Therefore, the holes
under the THS306x family PowerPAD package
should make their connection to the internal
ground plane with a complete connection around
the entire circumference of the plated-through
hole.
6. The top-side solder mask should leave the
terminals of the package and the thermal pad
area with its five holes exposed. The bottom-side
solder mask should cover the five holes of the
thermal pad area. This prevents solder from
being pulled away from the thermal pad area
during the reflow process.
7. Apply solder paste to the exposed thermal pad
area and all IC terminals.
8. With these preparatory steps in place, the IC is
simply placed in position and run through the
16
Submit Documentation Feedback
Copyright © 2002–2009, Texas Instruments Incorporated
Product Folder Link(s): THS3061 THS3062