DAC6574_16 Datasheet, PDF (16/34 Pages) Texas Instruments – QUAD, 10-BIT, LOW-POWER, VOLTAGE OUTPUT,INTERFACE DIGITAL-TO-ANALOG CONVERTER

DAC6574
SLAS408 – DECEMBER 2003
DAC6574 Registers
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Table 3. DAC6574 Architecture Register Descriptions
REGISTER
CTRL[7:0]
MSB[7:0]
LSB[7:0]
TRA[11:0], TRB[11:0],
TRC[11:0], TRD[11:0]
DRA[11:0], DRB[11:0],
DRC[11:0], DRD[11:0]
DESCRIPTION
Stores 8-Bit wide control byte sent by the master
Stores the 8 most significant bits of unsigned binary data sent by the master. Can also store 2-bit power-down
data.
Stores the 2 least significant bits of unsigned binary data sent by the master (in LSB[7] and LSB[6]).
12-bit temporary storage registers assigned to each channel. Two MSBs store power-down information, 10 LSBs
store data.
12-bit DAC registers for each channel. Two MSBs store power-down information, 10 LSBs store DAC data. An
update of this register means a DAC update with data or power-down.
DAC6574 as a Slave Receiver - Standard and Fast Mode
Figure 33 shows the standard and fast mode master transmitter addressing a DAC6574 Slave Receiver with a
7-bit address.
S SLAVE ADDRESS R/W A Ctrl-Byte A MS-Byte A LS-Byte A/A P
0 (write)
Data Transferred
(n* Words + Acknowledge)
Word = 16 Bit
From Master to DAC6574
DAC6574 I²C-SLAVE ADDRESS:
From DAC6574 to Master
A = Acknowledge (SDA LOW)
A = Not Acknowledge (SDA HIGH)
S = START Condition
Sr = Repeated START Condition
P = STOP Condition
MSB
1001
Factory Preset
LSB
1 A1 A0 R/W
0 = Write to DAC6574
1 = Read from DAC6574
A0 = I²C Address Pin
A1 = I²C Address Pin
Figure 33. Standard and Fast Mode: Slave Receiver
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