DAC5672 Datasheet, PDF (16/28 Pages) Texas Instruments – DUAL, 14-BIT 200 MSPS DIGITAL - TO - ANALOG CONVERTER

DAC5672
SLAS440C – NOVEMBER 2004 – REVISED DECEMBER 2010
APPLICATION INFORMATION
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Theory of Operation
The architecture of the DAC5672 uses a current steering technique to enable fast switching and high update
rate. The core element within the monolithic DAC is an array of segmented current sources that are designed to
deliver a full-scale output current of up to 20 mA. An internal decoder addresses the differential current switches
each time the DAC is updated and a corresponding output current is formed by steering all currents to either
output summing node, IOUT1 or IOUT2. The complementary outputs deliver a differential output signal, which
improves the dynamic performance through reduction of even-order harmonics, common-mode signals (noise),
and double the peak-to-peak output signal swing by a factor of two, as compared to single-ended operation.
The segmented architecture results in a significant reduction of the glitch energy and improves the dynamic
performance (SFDR) and DNL. The current outputs maintain a very high output impedance of greater
than 300 kΩ.
When pin 42 (GSET) is high (simultaneous gain set mode), the full-scale output current for both DACs is
determined by the ratio of the internal reference voltage (1.2 V) and an external resistor (R_SET) connected to
BIASJ_A. When GSET is low (independent gain set mode), the full-scale output current for each DAC is
determined by the ratio of the internal reference voltage (1.2 V) and separate external resistors (R_SET) connected
to BIASJ_A and BIASJ_B. The resulting I_REF is internally multiplied by a factor of 32 to produce an effective DAC
output current that can range from 2 mA to 20 mA, depending on the value of R_SET.
The DAC5672 is split into a digital and an analog portion, each of which is powered through its own supply pin.
The digital section includes edge-triggered input latches and the decoder logic, while the analog section
comprises both the current source array with its associated switches, and the reference circuitry.
DAC Transfer Function
Each of the DACs in the DAC5672 has a set of complementary current outputs, IOUT1 and IOUT2. The full-scale
output current, I_OUTFS, is the summation of the two complementary output currents:
IOUTFS + IOUT1 ) IOUT2
(1)
The individual output currents depend on the DAC code and can be expressed as:
ǒ Ǔ IOUT1 + IOUTFS
Code
16384
(2)
IOUT2 = IOUTFS x ^{æçççè16318633-8C4ode÷÷÷öø}
(3)
where Code is the decimal representation of the DAC data input word. Additionally, I_OUTFS is a function of the
reference current I_REF, which is determined by the reference voltage and the external setting resistor (R_SET).
IOUTFS + 32
IREF + 32
VREF
RSET
(4)
In most cases, the complementary outputs drive resistive loads or a terminated transformer. A signal voltage
develops at each output according to:
VOUT1 + IOUT1 RLOAD
(5)
VOUT2 + IOUT2 RLOAD
(6)
The value of the load resistance is limited by the output compliance specification of the DAC5672. To maintain
specified linearity performance, the voltage for IOUT1 and IOUT2 must not exceed the maximum allowable
compliance range.
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