AWR1443 Datasheet, PDF (16/76 Pages) Texas Instruments – Single-Chip 77- and 79-GHz FMCW Radar Sensor

AWR1443
SWRS202 – MAY 2017
www.ti.com
REGISTER
ADDRESS ⁽¹⁾
PIN NAME
NERROR_IN
WARM_RESET
NERROR_OUT
EA50h
EA54h
EA58h
TCK
TMS
TDI
EA5Ch
TDO
Table 4-2. Pin Multiplexing (ABL0161 Package) (continued)
DIGITAL PIN
PIN
MUX CONFIG
VALUE [Bits3:0]
SIGNAL NAME
FUNCTION
SIGNAL DESCRIPTION
SIGNAL TYPE
PAD STATE
nReset = 0 [ASSERTED]
STATE
INTERNAL WEAK
PULL STATE
Failsafe input to the device. Nerror
output from any other device can be
P7
NERROR_IN
concentrated in the error signaling
monitor module inside the device
I
Hi-Z
and appropriate action can be taken
by Firmware
Open drain fail safe warm reset
signal. Can be driven from PMIC for
N12
WARM_RESET
diagnostic or can be used as status
IO
Hi-Z Input Open Drain
signal that the device is going
through reset.
Open drain fail safe output signal.
Connected to PMIC/Processor/MCU
N8
NERROR_OUT
to indicate that some severe
O
Hi-Z
Open Drain
criticality fault has happened.
Recovery would be through reset.
0
GPIO_17
General Purpose IO
IO
Hi-Z
Weak Pull Down
1
TCK
JTAG Clock
I
M13
2
MSS_UARTB_TX
Debug: Firmware Trace
O
6
BSS_UART_RX
Debug: Firmware Trace
I
0
GPIO_18
General Purpose IO
IO
Hi-Z
Weak Pull Up
L13
1
TMS
JTAG Test Mode Select
IO
2
BSS_UART_TX
Debug: Firmware Trace
O
0
GPIO_23
General Purpose IO
IO
Hi-Z
Weak Pull Up
H13
1
TDI
JTAG Test Data In
I
MSS_UARTA_RX
IO
0
GPIO_24
General Purpose IO
IO
Hi-Z
1
TDO
JTAG Test Data Out
O
MSS_UARTA_TX
IO
J13
6
MSS_UARTB_TX
Debug: Firmware Trace
O
BSS_UART_TX
Debug: Firmware Trace
O
7
SOP0
Sense On Power [Reset] Line
Impacts boot mode
I
16
Terminal Configuration and Functions
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