ADS7865_14 Datasheet, PDF(16/33 Page) Texas Instruments – Dual, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling Analog-to-Digital Converter

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ADS7865_14 Datasheet, PDF (16/33 Pages) Texas Instruments – Dual, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling Analog-to-Digital Converter

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ADS7865

SBAS441C â OCTOBER 2008 â REVISED APRIL 2012

RESET

The ADS7865 features an internal power-on-reset

(POR) function. When the device is powered up, the

POR sets the device to default mode when AVDD

reaches 1.8V.

REFIN

The reference input is not buffered and is directly

connected to the ADC. The converter generates

spikes on the reference input voltage because of

internal switching. Therefore, an external capacitor to

the analog ground (AGND) should be used to

stabilize the reference input voltage. This capacitor

should be at least 470nF. Ceramic capacitors (X5R

type) with values up to 1Î¼F are commonly available

as SMD in 0402 size.

REFOUT

The ADS7865 includes a low-drift, 2.5V internal

reference source. This source feeds a 10-bit string

DAC that is controlled via the DAC register. As a

result of this architecture, the voltage at the REFOUT

pin is programmable in 2.44mV steps and can be

adjusted to specific application requirements without

the use of additional external components.

However, the DAC output voltage should not be

programmed below 0.5V to ensure the correct

functionality of the reference output buffer. This buffer

is connected between the DAC and the REFOUT pin,

and is capable of driving the capacitor at the REFIN

pin. A minimum of 470nF is required to keep the

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reference stable (see the previous discussion of

REFIN). For applications that use an external

reference source, the internal reference can be

disabled using bit RP in the SDI Register (see the

Digital section). The settling time of the REFOUT pin is

500Î¼s (max) with the reference capacitor connected.

The default value of the REFOUT pin after power-up is

2.5V.

For operation with a 2.7V analog supply and a 2.5V

reference, the internal reference buffer requires a rail-

to-rail input and output. Such buffers typically contain

two input stages; when the input voltage passes the

mid-range area, a transition occurs at the output

because of switching between the two input stages.

In this voltage range, rail-to-rail amplifiers generally

show a very poor power-supply rejection.

As a result of this poor performance, the ADS7865

buffer has a fixed transition at DAC code 509

(0x1FD). At this code, the DAC may show a jump of

up to 10mV in its transfer function.

Table 3 lists some examples of internal reference

DAC settings.

Table 3. Reference DAC Setting Examples

VREFOUT

0.500V

1.241V

1.240V

2.500V

DECIMAL

CODE

205

508

509

1023

BINARY CODE

00 1100 1101

01 1111 1100

01 1111 1101

11 1111 1111

HEXADECIMAL

CODE

1FC

1FD

3FF

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