AM3874 Datasheet, PDF (153/345 Pages) Texas Instruments – AM387x Sitara ARM Microprocessors (MPUs)

AM3874, AM3872, AM3871
www.ti.com
HEX
ADDRESS
REGISTER
NAME
0x4814 0B44 PINCNTL210
0x4814 0B48 PINCNTL211
0x48140B4C PINCNTL212
0x4814 0B50 PINCNTL213
0x4814 0B54 PINCNTL214
0x4814 0B58
0x4814 0B5C
0x4814 0B60
0x4814 0B64
0x4814 0B68
0x4814 0B6C
0x4814 0B70
0x4814 0B74
0x4814 0B78
PINCNTL215
PINCNTL216
PINCNTL217
PINCNTL218
PINCNTL219
PINCNTL220
PINCNTL221
PINCNTL222
PINCNTL223
0x4814 0B7C PINCNTL224
0x4814 0B80 PINCNTL225
0x4814 0B84 PINCNTL226
0x4814 0B88 PINCNTL227
0x4814 0B8C PINCNTL228
0x4814 0B90 PINCNTL229
0x4814 0B94 PINCNTL230
0x4814 0B98 PINCNTL231
0x4814 0B9C PINCNTL232
0x4814 0BA0 PINCNTL233
0x4814 0BA4 PINCNTL234
0x4814 0BA8 PINCNTL235
0x4814 0BAC PINCNTL236
0x4814 0BB0 PINCNTL237
0x4814 0BB4 PINCNTL238
0x4814 0BB8 PINCNTL239
PIN
NO.
AF25
AD25
AC25
AH26
AA24
Y23
W22
AG26
AH27
AF26
AE26
AD26
AG27
AC26
AA25
V22
W23
Y24
AF27
AG28
AE27
AF28
J27
H28
P24
L24
L23
R25
J26
H27
Table 4-11. PINCNTLx Registers MUXMODE Functions (continued)
0x1
VOUT[1]_B_CB_C[5]
VOUT[1]_B_CB_C[6]
VOUT[1]_B_CB_C[7]
VOUT[1]_B_CB_C[8]
VOUT[1]_B_CB_C[9]
VOUT[1]_G_Y_YC[3]
VOUT[1]_G_Y_YC[4]
VOUT[1]_G_Y_YC[5]
VOUT[1]_G_Y_YC[6]
VOUT[1]_G_Y_YC[7]
VOUT[1]_G_Y_YC[8]
VOUT[1]_G_Y_YC[9]
VOUT[1]_R_CR[4]
VOUT[1]_R_CR[5]
VOUT[1]_R_CR[6]
VOUT[1]_R_CR[7]
VOUT[1]_R_CR[8]
VOUT[1]_R_CR[9]
VOUT[1]_G_Y_YC[2]
VOUT[1]_R_CR[3]
VOUT[1]_R_CR[2]
VOUT[1]_B_CB_C[2]
EMAC_RMREFCLK
0x2
EMAC[1]_MRXD[1]
EMAC[1]_MRXD[2]
EMAC[1]_MRXD[3]
EMAC[1]_MRXD[4]
EMAC[1]_MRXD[5]
EMAC[1]_MRXD[6]
EMAC[1]_MRXD[7]
EMAC[1]_MRXDV
EMAC[1]_GMTCLK
EMAC[1]_MTXD[0]
EMAC[1]_MTXD[1]
EMAC[1]_MTXD[2]
EMAC[1]_MTXD[3]
EMAC[1]_MTXD[4]
EMAC[1]_MTXD[5]
EMAC[1]_MTXD[6]
EMAC[1]_MTXD[7]
EMAC[1]_MTXEN
GPMC_A[13]^(M1)
GPMC_A[14]^(M1)
GPMC_A[15]^(M1)
GPMC_A[0]^(M1)
0x4
VIN[1]A_D[2]
VIN[1]A_D[3]
VIN[1]A_D[4]
VIN[1]A_D[5]
VIN[1]A_D[6]
VIN[1]A_D[8]
VIN[1]A_D[9]
VIN[1]A_D[10]
VIN[1]A_D[11]
VIN[1]A_D[12]
VIN[1]A_D[13]
VIN[1]A_D[14]
VIN[1]A_D[15]
VIN[1]A_D[16]
VIN[1]A_D[17]
VIN[1]A_D[18]
VIN[1]A_D[19]
VIN[1]A_D[20]
VIN[1]A_D[21]
VIN[1]A_D[22]
VIN[1]A_D[23]
VIN[1]A_D[7]
MUXMODE[7:0] SETTINGS⁽¹⁾
0x8
0x10
0x20
UART4_TXD^(M2)
UART3_RXD^(M1)
UART3_TXD^(M1)
I2C[3]_SCL^(M3)
I2C[3]_SDA^(M3)
HDMI_SCL^(M1)
HDMI_SDA^(M1)
HDMI_HPDET^(M1)
HDMI_CEC^(M1)
SPI[3]_SCS[1]
SPI[3]_SCLK^(M1)
SPI[3]_D[1]^(M1)
SPI[3]_D[0]^(M1)
UART5_RXD^(M2)
UART5_TXD^(M2)
SPI[2]_SCS[2]
SPI[2]_SCLK^(M1)
SPI[2]_D[1]^(M1)
SPI[2]_D[0]^(M1)
MDCLK
MDIO
EMAC[0]_MTCLK/
EMAC[0]_RGRXC ⁽²⁾
EMAC[0]_MCOL/
EMAC[0]_RGRXCTL⁽²⁾
EMAC[0]_MCRS/
EMAC[0]_RGRXD[2]⁽²⁾
EMAC[0]_MRXER/
EMAC[0]_RGTXCTL⁽²⁾
EMAC[0]_MRCLK/
EMAC[0]_RGTXC⁽²⁾
VIN[1]B_D[0]
VIN[1]B_D[1]
VIN[1]B_D[2]
VIN[1]B_D[3]
VIN[1]B_D[4]
EMAC[0]_RMRXD[0]
EMAC[0]_RMRXD[1]
EMAC[0]_RMRXER
EMAC[0]_RMCRSDV
SPI[3]_SCS[3]
SPI[3]_SCS[2]
SPRS695 – SEPTEMBER 2011
0x40
I2C[2]_SCL^(M2)
I2C[2]_SDA^(M2)
TIM2_IO^(M3)
I2C[2]_SDA^(M3)
0x80
GP3[2]
GP3[3]
GP3[4]
GP3[5]
GP3[6]
GP3[7]
GP3[8]
GP3[9]
GP3[10]
GP3[11]
GP3[12]
GP3[13]
GP3[14]
GP3[15]
GP3[16]
GP3[17]
GP3[18]
GP3[19]
GP3[20]
GP3[21]
GP3[22]
GP3[30]^(M0)
GP1[10]^(M0)
GP1[11]^(M0)
GP1[12]^(M0)
GP3[23]
GP3[24]
GP3[25]
GP3[26]
GP3[27]
(2) Within this MUXMODE setting, EMAC[x] GMII or RGMII pin functions are selected via the RGMII0_EN and/or RGMII1_EN bits (8 and 9, respectively) in the GMII_SEL register
[0x4814_0650] of the Control Module. "0" = GMII (default) and "1" = RGMII.
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): AM3874 AM3872 AM3871
Device Configurations 153