TMS320C6742_16 Datasheet, PDF (150/187 Pages) Texas Instruments – Fixed- and Floating-Point DSP

TMS320C6742
SPRS587E – JUNE 2009 – REVISED MARCH 2014
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6.18.3 HPI Electrical Data/Timing
Table 6-68. Timing Requirements for Host-Port Interface [1.2V, 1.1V]^{(1) (2)}
NO.
1 t_{su(SELV-HSTBL)}
2 t_{h(HSTBL-SELV)}
3 t_w(HSTBL)
4 t_w(HSTBH)
9 t_{su(SELV-HASL)}
10 t_h(HASL-SELV)
11 t_{su(HDV-HSTBH)}
12 t_h(HSTBH-HDV)
13 t_{h(HRDYL-HSTBH)}
Setup time, select signals⁽³⁾ valid before UHPI_HSTROBE low
Hold time, select signals⁽³⁾ valid after UHPI_HSTROBE low
Pulse duration, UHPI_HSTROBE active low
Pulse duration, UHPI_HSTROBE inactive high between consecutive accesses
Setup time, selects signals valid before UHPI_HAS low
Hold time, select signals valid after UHPI_HAS low
Setup time, host data valid before UHPI_HSTROBE high
Hold time, host data valid after UHPI_HSTROBE high
Hold time, UHPI_HSTROBE high after UHPI_HRDY low. UHPI_HSTROBE
should not be inactivated until UHPI_HRDY is active (low); otherwise, HPI writes
will not complete properly.
1.2V, 1.1V, 1.0V
MIN
MAX
5
2
15
2M
5
2
5
2
2
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
16 t_{su(HASL-HSTBL)}
17 t_{h(HSTBL-HASH)}
Setup time, UHPI_HAS low before UHPI_HSTROBE low
Hold time, UHPI_HAS low after UHPI_HSTROBE low
5
ns
2
ns
(1) UHPI_HSTROBE refers to the following logical operation on UHPI_HCS, UHPI_HDS1, and UHPI_HDS2: [NOT(UHPI_HDS1 XOR
UHPI_HDS2)] OR UHPI_HCS.
(2) M=SYSCLK2 period in ns.
(3) Select signals include: HCNTL[1:0], HR/W and HHWIL.
150 Peripheral Information and Electrical Specifications
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