TPS62420_14 Datasheet, PDF (15/37 Pages) Texas Instruments – 2.25MHz 600mA/1000mA Dual Step Down Converter In Small 3x3mm QFN Package

TPS62420, TPS62421
www.ti.com
SLVS676C – JUNE 2006 – REVISED JUNE 2010
Converter 2
In the adjustable output voltage version TPS62400, the converter 2 output voltage is set by an external resistor
divider connected to ADJ2 Pin and uses an external feed forward capacitor of 33pF. In fixed output voltage
version TPS62421, the default output voltage is fixed to 1.8V. In this case, the ADJ2 pin must be connected
directly to the converter 2 output voltage VOUT2. It is also possible to change the output voltage of converter 2
via the EasyScale™ Interface. In this case, the ADJ2 Pin must be directly connected to converter 2 output
voltage VOUT2 and no external resistors may be connected.
POWER SAVE MODE
The Power Save Mode is enabled with Mode/Data Pin set to 0 for both converters. If the load current of a
converter decreases, this converter will enter Power Save Mode operation automatically. The transition to Power
Save Mode of a converter is independent from the operating condition of the other converter. During Power Save
Mode the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent
current to maintain high efficiency. The converter will position the output voltage in PFM mode to typically
1.01xVOUT. This voltage positioning feature minimizes voltage drops caused by a sudden load step.
In order to optimize the converter efficiency at light load the average inductor current is monitored. The device
changes from PWM Mode to Power Save Mode, if in PWM mode the inductor current falls below a certain
threshold. The typical output current threshold depends on VIN and can be calculated according to Equation 1
for each converter.
Equation 1: Average output current threshold to enter PFM Mode
I
OUT_PFM_enter
+
VIN_DCDC
32 W
(1)
Equation 2: Average output current threshold to leave PFM Mode
I
OUT_PFM_leave
+
VIN_DCDC
24 W
(2)
In order to keep the output voltage ripple in Power Save Mode low, the output voltage is monitored with a single
threshold comparator (skip comparator). As the output voltage falls below the skip comparator threshold (skip
comp) of 1.01 x VOUTnominal, the corresponding converter starts switching for a minimum time period of
typically 1ms and provides current to the load and the output capacitor. Therefore the output voltage increases
and the device maintains switching until the output voltage trips the skip comparator threshold (skip comp) again.
At this moment all switching activity is stopped and the quiescent current is reduced to minimum. The load is
supplied by the output capacitor until the output voltage has dropped below the threshold again. Hereupon the
device starts switching again. The Power Save Mode is exited and PWM Mode entered in case the output
current exceeds the current IOUT_PFM_leave, or if the output voltage falls below a second comparator
threshold, called skip comparator low (Skip Comp Low) threshold. This skip comparator low threshold is set to
–2% below nominal Vout, and enables a fast transition from Power Save Mode to PWM Mode during a load step.
In Power Save Mode the quiescent current is reduced typically to 19mA for one converter and 32mA for both
converters active. This single skip comparator threshold method in Power Save Mode results in a very low output
voltage ripple. The ripple depends on the comparator delay and the size of the output capacitor. Increasing
output capacitor values minimizes the output ripple. The Power Save Mode can be disabled through the
MODE/DATA pin set to high. Both converters then operate in fixed PWM mode. Power Save Mode
Enable/Disable applies to both converters.
Dynamic Voltage Positioning
This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is
activated in Power Save Mode operation. It provides more headroom for both the voltage drop at a load step,
and the voltage increase at a load throw-off. This improves load transient behavior.
At light loads, in which the converter operate in PFM Mode, the output voltage is regulated typically 1% higher
than the nominal value. In case of a load transient from light load to heavy load, the output voltage drops until it
reaches the skip comparator low threshold set to –2% below the nominal value and enters PWM mode. During a
load throw off from heavy load to light load, the voltage overshoot is also minimized due to active regulation
turning on the N-channel switch.
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Product Folder Link(s): TPS62420 TPS62421