TPS543B20 Datasheet, PDF (15/33 Pages) Texas Instruments – 4 Vin to 19 Vin, 25-A Stackable, Synchronous Step-down SWIFT Converter with Adaptive Internal Compensation

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TPS543B20
SLUSCR1 – MAY 2017
8.4.6.1 Ramp Selections
RAMP pin sets internal ramp amplitude for the control loop. RAMP amplitude is determined by internal RC,
selected by the resistor connected from MODE pin to GND, to optimize the control loop. See Table 3.
Table 3. RAMP Pin-strapping Selection
C_RAMP (pF)
1
RESISTOR VALUE (kΩ)⁽¹⁾
0
1.42
8.66
1.94
15.4
2.58
23.7
3.43
34.8
4.57
51.1
6.23
78.7
8.91
121
14.1
187
29.1
Open
(1) The E48 series resistors with tolerance of 1% or less are
recommended
8.4.7 Switching Frequency
The converter supports analog frequency selections from 300 kHz to 2 MHz. By connecting a resistor from RT
pin to GND.
Switching Frequency Configuration Configuration
MODE
TPS543B20
RT
SYNC
Figure 14. RT Pin Sets the Switching Frequency
Resistor R_RT sets the continuous switching frequence selection by
R_RT
=
20 ´ 10⁹
¦_SW
- ^{¦SW ´ 2}
2000
where
• R is the resistor from RT pin to GND, in Ω
• ƒ_SW is the desired switching frequency, in Hz
(1)
8.4.8 Synchronization Configuration
The TPS543B20 device can synchronize to an external clock which must be equal to or higher than internal
frequency setting, the external clock should be applied to the SYNC pin. A sudden change in synchronization
clock frequency causes an associated control loop response, resulting in an overshoot or undershoot on the
output voltage.
Copyright © 2017, Texas Instruments Incorporated
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