TPS53353 Datasheet, PDF (15/29 Pages) Texas Instruments – High-Efficiency 20-A Synchronous Buck Converter with Eco-mode™

TPS53353
www.ti.com
APPLICATION INFORMATION
SLUSAK2 – AUGUST 2011
General Description
The TPS53353 is a high-efficiency, single channel, synchronous buck converter suitable for low output voltage
point-of-load applications in computing and similar digital consumer applications. The device features proprietary
D-CAP™ mode control combined with an adaptive on-time architecture. This combination is ideal for building
modern low duty ratio, ultra-fast load step response DC-DC converters. The output voltage ranges from 0.6 V to
5.5 V. The conversion input voltage range is from 3 V up to 15 V and the VDD bias voltage is from 4.5 V to 25 V.
The D-CAP™ mode uses the equivalent series resistance (ESR) of the output capacitor(s) to sense the device
current . One advantage of this control scheme is that it does not require an external phase compensation
network. This allows a simple design with a low external component count. Eight preset switching frequency
values can be chosen using a resistor connected from the RF pin to ground or VREG. Adaptive on-time control
tracks the preset switching frequency over a wide input and output voltage range while allowing the switching
frequency to increase at the step-up of the load.
The TPS53353 has a MODE pin to select between auto-skip mode and forced continuous conduction mode
(FCCM) for light load conditions. The MODE pin also sets the selectable soft-start time ranging from 0.7 ms to
5.6 ms as shown in Table 1.
Enable, Soft Start, and Mode Selection
When the EN pin voltage rises above the enable threshold voltage (typically 1.2 V), the controller enters its
start-up sequence. The internal LDO regulator starts immediately and regulates to 5 V at the VREG pin. The
controller then uses the first 250 μs to calibrate the switching frequency setting resistance attached to the RF pin
and stores the switching frequency code in internal registers. During this period, the MODE pin also senses the
resistance attached to this pin and determines the soft-start time . Switching is inhibited during this phase. In the
second phase, an internal DAC starts ramping up the reference voltage from 0 V to 0.6 V. Depending on the
MODE pin setting, the ramping up time varies from 0.7 ms to 5.6 ms. Smooth and constant ramp-up of the
output voltage is maintained during start-up regardless of load current.
Table 1. Soft-Start and MODE Settings
MODE SELECTION
ACTION
Auto Skip
Pull down to GND
Forced CCM⁽¹⁾
Connect to PGOOD
SOFT-START TIME (ms)
0.7
1.4
2.8
5.6
0.7
1.4
2.8
5.6
R_MODE (kΩ)
39
100
200
475
39
100
200
475
(1) Device enters FCCM after the PGOOD pin goes high when MODE is connected to PGOOD through
the resistor R_MODE.
After soft-start begins, the MODE pin becomes the input of an internal comparator which determines auto skip or
FCCM mode operation. If MODE voltage is higher than 1.3 V, the converter enters into FCCM mode. Otherwise
it will be in auto skip mode at light load condition. Typically, when FCCM mode is selected, the MODE pin is
connected to PGOOD through the R_MODE resistor, so that before PGOOD goes high the converter remains in
auto skip mode.
Copyright © 2011, Texas Instruments Incorporated
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