SN65MLVD206B Datasheet, PDF (15/36 Pages) Texas Instruments – Multipoint-LVDS Line Drivers and Receivers (Transceivers) With IEC ESD Protection

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SN65MLVD206B
SLLSEX9 – DECEMBER 2016
CLOCK INPUT
V_A –V_B
1/f0
INPUTS
V_A –V_B
V_IC
0.2 V – Type 1 1 V
0.4 V – Type 2
IDEAL
OUTPUT
V_OH
V_CC/2
V_OL
ACTUAL
OUTPUT
V_OH
V_CC/2
V_OL
Period Jitter
1/f0
tc(n)
t_jit(per) = │t _c(n) –1/f0 │
V_A
PRBS INPUT
V_B
V_OH
OUTPUT _VCC/2
V_OL
Peak-to-Peak Jitter
t_jit(pp)
A. All input pulses are supplied by an Agilent 8304A Stimulus System.
B. The measurement is made on a TEK TDS6604 running TDSJIT3 application software
C. Period jitter is measured using a 10 MHz 50 ±1% duty cycle clock input.
D. Peak-to-peak jitter is measured using a 200 Mbps 2¹⁵-1 PRBS input.
Figure 13. Receiver Jitter Measurement Waveforms
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