OPA322_1111 Datasheet, PDF (15/34 Pages) Texas Instruments – 20-MHz, Low-Noise, 1.8-V, RRI/O, CMOS Operational Amplifier with Shutdown

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OPA322, OPA322S
OPA2322, OPA2322S
OPA4322, OPA4322S
SBOS538C – JANUARY 2011 – REVISED NOVEMBER 2011
OVERLOAD RECOVERY TIME
Overload recovery time is the time required for the output of the amplifier to come out of saturation and recover
to the linear region. Overload recovery is particularly important in applications where small signals must be
amplified in the presence of large transients. Figure 31 and Figure 32 show the positive and negative overload
recovery times of the OPA322, respectively. In both cases, the time elapsed before the OPA322 comes out of
saturation is less than 100 ns. In addition, the symmetry between the positive and negative recovery times allows
excellent signal rectification without distortion of the output signal.
3
1
V_S = ±2.75 V
2.5
Output
G = -10
0.5
Input
2
0
1.5
-0.5
1
-1
0.5
-1.5
0
-0.5
-1
9.75
Input
10
10.25
10.5
10.75
11
Time (250 ns/div)
-2
-2.5
-3
9.75
Output
V_S = ±2.75 V
G = -10
10
10.25
10.5
10.75
11
Time (250 ns/div)
Figure 31. Positive Recovery Time
Figure 32. Negative Recovery Time
GENERAL LAYOUT GUIDELINES
The OPA322 is a wideband amplifier. To realize the full operational performance of the device, follow good
high-frequency printed circuit board (PCB) layout practices. The bypass capacitors must be connected between
each supply pin and ground as close to the device as possible. The bypass capacitor traces should be designed
for minimum inductance.
LEADLESS DFN PACKAGE
The OPA2322 uses the DFN style package (also known as SON), which is a QFN with contacts on only two
sides of the package bottom. This leadless package maximizes PCB space and offers enhanced thermal and
electrical characteristics through an exposed pad. One of the primary advantages of the DFN package is its low
height (0.8 mm).
DFN packages are physically small, and have a smaller routing area. Additionally, they offer improved thermal
performance, reduced electrical parasitics, and a pinout scheme that is consistent with other commonly-used
packages (such as SO and MSOP). The absence of external leads also eliminates bent-lead issues.
The DFN package can easily be mounted using standard PCB assembly techniques. See the application reports,
QFN/SON PCB Attachment (SLUA271) and Quad Flatpack No-Lead Logic Packages (SCBA017), both available
for download at www.ti.com. The exposed leadframe die pad on the bottom of the DFN package should be
connected to the most negative potential (V–). The dimension of the exposed thermal die pad is 2 mm × 1.2
mm and is centered.
Copyright © 2011, Texas Instruments Incorporated
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Product Folder Link(s): OPA322 OPA322S OPA2322 OPA2322S OPA4322 OPA4322S