LP3981_16 Datasheet, PDF (15/25 Pages) Texas Instruments – Micropower, 300-mA Ultra-Low-Dropout CMOS Voltage Regulator

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LP3981
SNVS159H – OCTOBER 2001 – REVISED JULY 2015
10 Power Supply Recommendations
The LP3981 is designed to operate from an input voltage supply range between 2.5 V and 6 V. The input voltage
range provides adequate headroom in order for the device to have a regulated output. This input supply must be
well regulated. If the input supply is noisy, additional input capacitors with low ESR can help to improve the
output noise performance.
11 Layout
11.1 Layout Guidelines
For best overall performance, place all circuit components on the same side of the circuit board and as near as
practical to the respective LDO pin connections. Place ground return connections to the input and output
capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side,
copper surface. The use of vias and long traces to create LDO circuit connections is strongly discouraged and
negatively affects system performance. This grounding and layout scheme minimizes inductive parasitics, and
thereby reduces load-current transients, minimizes noise, and increases circuit stability. A ground reference
plane is also recommended and is either embedded in the PCB itself or located on the bottom side of the PCB
opposite the components. This reference plane serves to assure accuracy of the output voltage, shield noise,
and behaves similar to a thermal plane to spread (or sink) heat from the LDO device. In most applications, this
ground plane is necessary to meet thermal requirements.
11.2 Layout Example
COUT
OUT ₁
IN 2
CIN
OUT-SENSE 3
6 EN
5 BYPASS
CBYPASS
4 GND
Figure 20. LP3981 Layout Example
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