LM10506_14 Datasheet, PDF (15/43 Pages) Texas Instruments – Triple Buck + LDO Power Management Unit

www.ti.com
LM10506
SNVS729F – SEPTEMBER 2011 – REVISED AUGUST 2014
Feature Description (continued)
In Automatic Mode, if the output current is less than 70 mA (typ.), the bucks automatically transition into PFM
(Pulse Frequency Modulation) operation to reduce the current consumption. At higher than 100 mA (typ.) they
operate in PWM mode. This increases the efficiency at lower output currents. The 30 mA (typ.) hysteresis is
designed in for stable Mode transition.
While in PWM mode, the output voltage is regulated by switching at a constant frequency and then modulating
the energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned
on, and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The
current limit comparator can also turn off the switch in case the current limit of the PFET is exceeded. In this
case the NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock
turning off the NFET and turning on the PFET.
V_OUT
PFM Mode at Light Load
PFET on
until
LPFM
limit
reached
NFET on
drains
inductor
current
until
I inductor=0
High PFM
Voltage
Threshold
reached,
go into
idle mode
Low PFM
Threshold,
turn on
PFET
Load
current
increases
PWM Mode at
Moderate to
Heavy Loads
Load current
increases, draws
Vout towards Low 2
PFM Threshold
Low 2 PFM
Threshold,
switch back to
PWM mode
High PFM
Threshold
~1.016*V_OUT
Low1 PFM
Threshold
~1.008*V_OUT
Low2 PFM
Threshold
V_OUT
Time
Figure 19. PFM vs PWM Operation
8.2.1.3 PFM Operation (Bucks 1, 2 & 3)
At very light loads, Bucks 1, 2, and Buck 3 enter PFM mode and operate with reduced switching frequency and
supply current to maintain high efficiency.
Bucks 1, 2, and 3 will automatically transition into PFM mode when either of two conditions occurs for a duration
of 32 or more clock cycles:
1. The inductor current becomes discontinuous, or
2. The peak PMOS switch current drops below the I_MODE level.
During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage
during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy
load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output
FETs such that the output voltage ramps between 0.8% and 1.6% (typical) above the nominal PWM output
voltage. If the output voltage is below the ‘high’ PFM comparator threshold, the PMOS power switch is turned on.
It remains on until the output voltage exceeds the ‘high’ PFM threshold or the peak current exceeds the I_PFM level
set for PFM mode.
Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: LM10506
Submit Documentation Feedback
15