CLC020 Datasheet, PDF (15/20 Pages) National Semiconductor (TI) – SMPTE 259M Digital Video Serializer with Integrated Cable Driver

CLC020
www.ti.com
SNLS046E – FEBRUARY 2000 – REVISED APRIL 2013
The outer layers of the PCB may be flooded with additional V_SS (ground) plane. These planes will improve
shielding and isolation as well as increase the intrinsic capacitance of the power supply plane system. Naturally,
to be effective, these planes must be tied to the V_SS power supply plane at frequent intervals with vias. Frequent
via placement also improves signal integrity on signal transmission lines by providing short paths for image
currents which reduces signal distortion. The planes should be pulled back from all transmission lines and
component mounting pads a distance equal to the width of the widest transmission line or the thickness of the
dielectric separating the transmission line from the internal power or ground plane(s) whichever is greater. Doing
so minimizes effects on transmission line impedances and reduces unwanted parasitic capacitances at
component mounting pads.
In especially noisy power supply environments, such as is often the case when using switching power supplies,
separate filtering may be used at the CLC020's VCO and output driver power pins. The CLC020 was designed
for this situation. The digital section, VCO and output driver power supply feeds are independent (see PIN
DESCRIPTIONS table and Pinout Drawing for details). Supply filtering may take the form of L-section or pi-
section, L-C filters in series with these V_DD inputs. Such filters are available in a single package from several
manufacturers. Despite being independent feeds, all device power supplies should be applied simultaneously as
from a common source. The CLC020 is free from power supply latch-up caused by circuit-induced delays
between the device's three separate power feed systems.
REPLACING THE GENNUM GS9022
The CLC020 is form-fit-function compatible with the Gennum GS9022. The CLC020 can improve the
performance of GS9022 applications using the existing PCB layout with the removal of certain components or
changes to component values. New layouts using the CLC020 will benefit from the greatly reduced ancilliary
component count and more compact layout.
The CLC020 does not require external VCO filtering components. The external VCO filtering components at pin
17 of the GS9022 may remain connected to the CLC020 without complications. It is suggested that these be
removed from the circuit board. The CLC020 uses pin 17 for its test pattern generator enable function. You will
find the TPG function very useful when you make this change.
Remove the C_OSC capacitor used by the GS9022 at pin 26. The CLC020 uses pin 26 as the BIST pass/fail
indicator output. You may attach a LED as an indicator to this pin, if desired. LED current should be limited to 10
mA maximum. The same LED type and current limiting resistor shown in Figure 9 at the Lock Detect output may
be used for this indicator function.
Remove any capacitor attached to pin 19. A capacitor attached to pin 19 will cause distortion of the output V_OH
level. The former data rate setting resistor, R_VCO, at pin 19 now functions as the output level setting resistor,
R_REF. It must be changed to a 1.69 kΩ, 1% value for correct output level setting.
The input series resistors and the P_CLK risetime filter capacitor used with the GS9022 are not needed for the
CLC020. These components should be removed from the circuit board and the resistors replaced by short
circuits (0Ω resistors). These series resistors will increase input signal rise and fall times if left on the board.
The CLC020 has current-mode serial cable driver outputs. These outputs have very high internal generator
resistance as one would expect of a current source. Though these current-mode outputs can produce the
equivalent drive voltages into the load, it is necessary to change and simplify the typical GS9022 output circuit
normally recommended for that device. The output load resistors at pins 22 and 23 must be changed to 75Ω, 1%
values. These resistors become the back-matching loads across which the CLC020's outputs develop drive
voltage. The series back-matching resistors used on the GS9022 should be removed and replaced with short
circuits. The risetime compensating capacitors across these resistors should be removed.
Pin 28 on the CLC020 is V_SS and must be connected to the negative supply or ground. On layouts designed to
mount the GS9022, the series R-C network connected to this pin should be replaced by short circuits (0Ω
resistors). The pull-up resistor connected to the Lock Detect output, pin 14, should be removed. It may be
replaced by a LED and current limiting resistor connected to V_SS if a visual lock indicator is desired.
The CLC020 has an internal pull-down at the Sync Detect Enable input and may be left unconnected in SMPTE
video-only applications.
The CLC020 has independent power supply pins for the VCO, V_SSO, pin 15 and V_DDO, pin 16. The CLC020 has
an output driver negative supply, V_SSSD, at pin 21. The output driver positive supply, V_DDSD, is pin 24 (as on the
GS9022). On new layouts, additional power supply filtering may be added at these pins, if desired.
Copyright © 2000–2013, Texas Instruments Incorporated
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