ADS7830_14 Datasheet, PDF (15/27 Pages) Texas Instruments – 8-Bit, 8-Channel Sampling ANALOG-TO-DIGITAL CONVERTER with I2C™ Interface

ADS7830
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READING IN F/S MODE
Figure 15 describes the interaction between the
master and the slave ADS7830 in Fast or Standard
(F/S) mode.
SBAS302C – DECEMBER 2003 – REVISED OCTOBER 2012
At the end of reading conversion data the ADS7830
can be issued a repeated START condition by the
master to secure bus operation for subsequent
conversions of the A/D converter. This would be the
most efficient way to perform continuous conversions.
ADC Power-Down Mode
ADC Sampling Mode
S 1 0 0 1 0 A1 A0 W A SD C2 C1 C0 PD1 PD0 X X A
Write-Addressing Byte
Command Byte
ADC Converting Mode
ADC Power-Down Mode
(depending on power-down selection bits)
Sr 1 0 0 1 0 A1 A0 R A D7 D6 D5 D4 D3 D2 D1 D0 N P
Read-Addressing Byte
1 x (8 Bits + not-ack)
See Note (1)
From Master to Slave
From Slave to Master
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
S = START Condition
P = STOP Condition
Sr = repeated START condition
W = '0' (WRITE)
R = '1' (READ)
(1) To secure bus operation and loop back to the stage of write-addressing for next conversion, use repeated START.
Figure 15. Typical Read Sequence in F/S Mode
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