ADC10664CIWMX Datasheet, PDF (15/22 Pages) Texas Instruments – ADC10662/ADC10664 10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold

ADC10662, ADC10664
www.ti.com
SNAS076E – JUNE 1999 – REVISED MARCH 2013
LAYOUT AND GROUNDING
In order to ensure fast, accurate conversions from the ADC10662 and ADC10664, it is necessary to use
appropriate circuit board layout techniques. The analog ground return path should be low-impedance and free of
noise from other parts of the system. Noise from digital circuitry can be especially troublesome.
All bypass capacitors should be located as close to the converter as possible and should connect to the
converter and to ground with short traces. The analog input should be isolated from noisy signal traces to avoid
having spurious signals couple to the input. Any external component (e.g., a filter capacitor) connected across
the converter's input should be connected to a very clean ground return point. Grounding the component at the
wrong point will result in reduced conversion accuracy.
DYNAMIC PERFORMANCE
Many applications require the A/D converter to digitize AC signals, but conventional DC integral and differential
nonlinearity specifications don't accurately predict the A/D converter's performance with AC input signals. The
important specifications for AC applications reflect the converter's ability to digitize AC signals without significant
spectral errors and without adding noise to the digitized signal. Dynamic characteristics such as signal-to-noise
ratio (SNR) and total harmonic distortion (THD), are quantitative measures of this capability.
An A/D converter's AC performance can be measured using Fast Fourier Transform (FFT) methods. A sinusoidal
waveform is applied to the A/D converter's input, and the transform is then performed on the digitized waveform.
The resulting spectral plot might look like the ones shown in the typical performance curves. The large peak is
the fundamental frequency, and the noise and distortion components (if any are present) are visible above and
below the fundamental frequency. Harmonic distortion components appear at whole multiples of the input
frequency. Their amplitudes are combined as the square root of the sum of the squares and compared to the
fundamental amplitude to yield the THD specification. Ensured limits for THD are given in the table of Electrical
Characteristics.
Signal-to-noise ratio is the ratio of the amplitude at the fundamental frequency to the rms value at all other
frequencies, excluding any harmonic distortion components. Ensured limits are given in the Electrical
Characteristics table. An alternative definition of signal-to-noise ratio includes the distortion components along
with the random noise to yield a signal-to-noise-plus-distortion ration, or S/(N + D).
The THD and noise performance of the A/D converter will change with the frequency of the input signal, with
more distortion and noise occurring at higher signal frequencies. One way of describing the A/D's performance
as a function of signal frequency is to make a plot of “effective bits” versus frequency. An ideal A/D converter
with no linearity errors or self-generated noise will have a signal-to-noise ratio equal to (6.02n + 1.76) dB, where
n is the resolution in bits of the A/D converter. A real A/D converter will have some amount of noise and
distortion, and the effective bits can be found by:
where
• S/(N + D) is the ratio of signal to noise and distortion, which can vary with frequency
(1)
As an example, an ADC10662 with a 4.85 V_P-P, 100 kHz sine wave input signal will typically have a signal-to-
noise-plus-distortion ratio of 59.2 dB, which is equivalent to 9.54 effective bits. As the input frequency increases,
noise and distortion gradually increase, yielding a plot of effective bits or S/(N + D) as shown in the typical
performance curves.
SPEED ADJUST
The speed adjust pin is connected to an on-chip current source that determines the converter's internal timing.
By connecting a resistor between the speed adjust pin and ground as shown in Figure 20, the internal
programming current is increased, which reduces the conversion time. The ADC10662 and ADC10664 are
specified and ensured for operation with R_SA = 14.0 kΩ (Mode 1) or R_SA = 8.26k (Mode 2). Smaller resistors will
result in faster conversion times, but linearity will begin to degrade as R_SA becomes smaller (see Typical
Performance Characteristics).
Copyright © 1999–2013, Texas Instruments Incorporated
Product Folder Links: ADC10662 ADC10664
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