TPA3251 Datasheet, PDF (14/39 Pages) Texas Instruments – 350W Mono PurePath Ultra-HD Analog-Input Class-D Amplifier

TPA3251
SLASE40D – MAY 2015 – REVISED APRIL 2016
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8 Parameter Measurement Information
All parameters are measured according to the conditions described in the Recommended Operating Conditions,
Typical Characteristics, BTL Configuration, Typical Characteristics, SE Configuration and Typical Characteristics,
PBTL Configuration sections.
Most audio analyzers will not give correct readings of Class-D amplifiers’ performance due to their sensitivity to
out of band noise present at the amplifier output. AES-17 + AUX-0025 pre-analyzer filters are recommended to
use for Class-D amplifier measurements. In absence of such filters, a 30-kHz low-pass filter (10 Ω + 47 nF) can
be used to reduce the out of band noise remaining on the amplifier outputs.
9 Detailed Description
9.1 Overview
To facilitate system design, the TPA3251 needs only a 12-V supply in addition to the (typical) 36-V power-stage
supply. An internal voltage regulator provides suitable voltage levels for the digital and low-voltage analog
circuitry, AVDD and DVDD. Additionally, all circuitry requiring a floating voltage supply, that is, the high-side gate
drive, is accommodated by built-in bootstrap circuitry requiring only an external capacitor for each half-bridge.
The audio signal path including gate drive and output stage is designed as identical, independent half-bridges.
For this reason, each half-bridge has separate bootstrap pins (BST_X). Power-stage supply pins (PVDD_X) and
gate drive supply pins (GVDD_X) are separate for each full bridge. Although supplied from the same 12-V
source, separating to GVDD_AB, GVDD_CD, and VDD on the printed-circuit board (PCB) by RC filters (see
application diagram for details) is recommended. These RC filters provide the recommended high-frequency
isolation. Special attention should be paid to placing all decoupling capacitors as close to their associated pins as
possible. In general, the physical loop with the power supply pins, decoupling capacitors and GND return path to
the device pins must be kept as short as possible and with as little area as possible to minimize induction (see
reference board documentation for additional information).
For a properly functioning bootstrap circuit, a small ceramic capacitor must be connected from each bootstrap pin
(BST_X) to the power-stage output pin (OUT_X). When the power-stage output is low, the bootstrap capacitor is
charged through an internal diode connected between the gate-drive power-supply pin (GVDD_X) and the
bootstrap pins. When the power-stage output is high, the bootstrap capacitor potential is shifted above the output
potential and thus provides a suitable voltage supply for the high-side gate driver. It is recommended to use 33-
nF ceramic capacitors, size 0603 or 0805, for the bootstrap supply. These 33nF capacitors ensure sufficient
energy storage, even during minimal PWM duty cycles, to keep the high-side power stage FET (LDMOS) fully
turned on during the remaining part of the PWM cycle.
Special attention should be paid to the power-stage power supply; this includes component selection, PCB
placement, and routing. As indicated, each full-bridge has independent power-stage supply pins (PVDD_X). For
optimal electrical performance, EMI compliance, and system reliability, it is important that each PVDD_X node is
decoupled with 1-μF ceramic capacitor placed as close as possible to the supply pins. It is recommended to
follow the PCB layout of the TPA3251 reference design. For additional information on recommended power
supply and required components, see the application diagrams in this data sheet.
The 12-V supply should be from a low-noise, low-output-impedance voltage regulator. Likewise, the 36-V power-
stage supply is assumed to have low output impedance and low noise. The power-supply sequence is not critical
as facilitated by the internal power-on-reset circuit, but it is recommended to release RESET after the power
supply is settled for minimum turn on audible artefacts. Moreover, the TPA3251 is fully protected against
erroneous power-stage turn on due to parasitic gate charging. Thus, voltage-supply ramp rates (dV/dt) are non-
critical within the specified range (see the Recommended Operating Conditions table of this data sheet).
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