THS7314_14 Datasheet, PDF (14/31 Pages) Texas Instruments – 3-Channel SDTV Video Amplifier With 5th-Order Filters and 6-dB Gain

THS7314
SLOS513A – DECEMBER 2006 – REVISED MARCH 2011
+ Vs
Internal
Circuitry
Input
+
800 kW
-
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145 mV Level
Shifter
Figure 30. Equivalent DC Input Mode Circuit
INPUT MODE OF OPERATION – AC SYNC TIP CLAMP
Some video DACs or encoders are not referenced to ground but rather to the positive power supply. These
DACs typically only sink current rather than the more traditional current sourcing DAC where the resistor is
referenced to ground. The resulting video signals can be too high of a voltage for a dc-coupled video buffer to
function properly. To account for this scenario the THS7314 incorporates a sync-tip clamp circuit. This function
requires a capacitor (nominally 0.1 μF) to be in series with the input. Note that while the term sync-tip-clamp is
used throughout this document, it should be noted that the THS7314 is be better termed as a dc-restoration
circuit based on how this function is performed. This circuit is an active clamp circuit and not a passive diode
clamp function.
The input to the THS7314 has an internal control loop which sets the lowest input applied voltage to clamp at
ground (0-V). By setting the reference at 0-V, the THS7314 allows a dc-coupled input to also function. Hence the
STC is considered transparent since it does not operate unless the input signal goes below ground. The signal
then goes thru the same 145-mV level shifter resulting in an output voltage low level of 290-mV. If the input
signal tries to go below the 0-V, the internal control loop of the THS7314 will source up to 3-mA of current to
increase the input voltage level on the THS7314 input side of the coupling capacitor. As soon as the voltage
goes above the 0-V level, the loop stops sourcing current and becomes high impedance.
One of the concerns about the sync-tip-clamp level is how the clamp reacts to a sync edge that has
overshoot—common in VCR signals or reflections found in poor PCB layouts. Ideally the STC should not react to
the overshoot voltage of the input signal. Otherwise, this could result in clipping on the rest of the video signal as
it may raise the bias voltage too much.
To help minimize this input signal overshoot problem, the control loop in the THS7314 has an internal low-pass
filter as shown in Figure 31. This filter reduces the response time of the STC circuit. This delay is a function of
how far the voltage is below ground, but in general it is about a 100-ns delay. The effect of this filter is to slow
down the response of the control loop so as not to clamp on the input overshoot voltage but rather the flat portion
of the sync signal.
As a result of this delay, the sync may have an apparent voltage shift. The amount of shift is dependant upon the
amount of droop in the signal as dictated by the input capacitor and the STC current flow. Because the sync is
primarily for timing purposes with syncing occurring on the edge of the sync signal, this shift is transparent in
most systems.
While this feature may not fully eliminate overshoot issues on the input signal for excessive overshoot and/or
ringing, the STC system should help minimize improper clamping levels. As an additional method to help
minimize this issue, an external capacitor (ex: 10 pF to 47 pF) to ground in parallel with the external termination
resistors can help filter overshoot problems.
It should be noted that this STC system is dynamic and does not rely upon timing in any way. It only depends on
the voltage appearing at the input pin at any given point in time. The STC filtering helps minimize level shift
problems associated with switching noises or very short spikes on the signal line. This helps ensure a very
robust STC system.
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