PCM3070_14 Datasheet, PDF (14/49 Pages) Texas Instruments – Stereo Audio Codec

PCM3070
SLAS724A – SEPTEMBER 2008 – REVISED NOVEMBER 2014
8.11 I²S LJF and RJF Timing in Master Mode (see Figure 1)
IOVDD = 1.8V
MIN MAX
t_d(WS)
t_d(DO-WS)
t_d(DO-BCLK)
t_s(DI)
t_h(DI)
t_r
t_f
WCLK delay
WCLK to DOUT delay (For LJF Mode only)
BCLK to DOUT delay
DIN setup
DIN hold
Rise time
Fall time
30
20
22
8
8
24
24
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IOVDD = 3.3V
MIN MAX
20
20
20
8
8
12
12
UNIT
ns
ns
ns
ns
ns
ns
ns
WCLK
BCLK
DOUT
DIN
t_d(WS)
t_d(DO-WS)
t_d(DO-BCLK)
t_S(DI)
t_h(DI)
All specifications at 25°C, DVdd = 1.8V
Figure 1. I²S LJF and RJF Timing in Master Mode
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