OPA631 Datasheet, PDF (14/18 Pages) Burr-Brown (TI) – Low Power, Single-Supply OPERATIONAL AMPLIFIERS TM

In the inverting configuration, three key design consider-
ation must be noted. The first is that the gain resistor (R_G)
becomes part of the signal channel input impedance. If input
impedance matching is desired (which is beneficial when-
ever the signal is coupled through a cable, twisted pair, long
PC board trace, or other transmission line conductor), R_G
may be set equal to the required termination value and R_F
adjusted to give the desired gain. This is the simplest
approach and results in optimum bandwidth and noise per-
formance. However, at low inverting gains, the resultant
feedback resistor value can present a significant load to the
amplifier output. For an inverting gain of 2, setting R_G to
50Ω for input matching eliminates the need for R_M but
requires a 100Ω feedback resistor. This has the interesting
advantage of the noise gain becoming equal to 2 for a 50Ω
source impedance—the same as the non-inverting circuits
considered above. However, the amplifier output will now
see the 100Ω feedback resistor in parallel with the external
load. In general, the feedback resistor should be limited to
the 200Ω to 1.5kΩ range. In this case, it is preferable to
increase both the R_F and R_G values, as shown in Figure 5,
and then achieve the input matching impedance with a third
resistor (R_M) to ground. The total input impedance becomes
the parallel combination of R_G and R_M.
The second major consideration, touched on in the previous
paragraph, is that the signal source impedance becomes part
of the noise gain equation and hence influences the band-
width. For the example in Figure 5, the R_M value combines in
parallel with the external 50Ω source impedance (at high
frequencies), yielding an effective driving impedance of
50Ω || 576Ω = 26.8Ω. This impedance is added in series with
R_G for calculating the noise gain. The resultant is 2.87 for
Figure 5, as opposed to only 2 if R_M could be eliminated as
discussed above. The bandwidth will, therefore, be lower for
the gain of –2 circuit of Figure 5 (NG = +2.87) than for the
gain of +2 circuit of Figure 1.
The third important consideration in inverting amplifier
design is setting the bias current cancellation resistors on the
non-inverting input (a parallel combination of R_T = 750Ω).
If this resistor is set equal to the total DC resistance looking
out of the inverting node, the output DC error, due to the
input bias currents, will be reduced to (Input Offset Current)
times R_F. With the DC blocking capacitor in series with R_G,
the DC source impedance looking out of the inverting node
is simply R_F = 750Ω for Figure 5. To reduce the additional
high-frequency noise introduced by this resistor, and power-
supply feedthrough, R_T is bypassed with a capacitor. As
long as R_T < 400Ω, its noise contribution will be minimal.
As a minimum, the OPA631 and OPA632 require an R_T
value of 50Ω to damp out parasitic-induced peaking—a
direct short to ground on the non-inverting input runs the
risk of a very high-frequency instability in the input stage.
OUTPUT CURRENT AND VOLTAGE
The OPA631 and OPA632 provide outstanding output volt-
age capability. Under no-load conditions at +25°C, the
output voltage typically swings closer than 130mV to either
supply rail; the guaranteed over temperature swing is within
400mV of either rail (V_S = +5V).
The minimum specified output voltage and current specifi-
cations over temperature are set by worst-case simulations at
the cold temperature extreme. Only at cold start-up will the
output current and voltage decrease to the numbers shown in
the guaranteed tables. As the output transistors deliver power,
their junction temperatures will increase, decreasing their
V_BE’s (increasing the available output voltage swing) and
increasing their current gains (increasing the available out-
put current). In steady-state operation, the available output
voltage and current will always be greater than that shown
in the over-temperature specifications, since the output stage
junction temperatures will be higher than the minimum
specified operating ambient.
To maintain maximum output stage linearity, no output
short-circuit protection is provided. This will not normally
be a problem since most applications include a series match-
ing resistor at the output that will limit the internal power
dissipation if the output side of this resistor is shorted to
ground.
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an ADC—including additional
external capacitance which may be recommended to im-
prove ADC linearity. A high-speed, high open-loop gain
amplifier like the OPA631 and OPA632 can be very suscep-
tible to decreased stability and closed-loop response peaking
when a capacitive load is placed directly on the output pin.
When the primary considerations are frequency response
flatness, pulse response fidelity, and/or distortion, the sim-
plest and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series isolation
resistor between the amplifier output and the capacitive
load.
The Typical Performance Curves show the recommended
R_S versus capacitive load and the resulting frequency re-
sponse at the load. Parasitic capacitive loads greater than
2pF can begin to degrade the performance of the OPA631
and OPA632. Long PC board traces, unmatched cables, and
connections to multiple devices can easily exceed this value.
Always consider this effect carefully, and add the recom-
mended series resistor as close as possible to the output pin
(see Board Layout Guidelines section).
14
OPA631, OPA632
SBOS066A