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LP2951JAN Datasheet, PDF (14/24 Pages) Texas Instruments – Adjustable Micropower Voltage Regulators
*When VIN ≤ 1.3V, the error flag pin becomes a high impedance, and the
error flag voltage rises to its pull-up voltage. Using VOUT as the pull-up volt-
age (see Figure 2), rather than an external 5V source, will keep the error flag
voltage under 1.2V (typ.) in this condition. The user may wish to divide down
the error flag voltage using equal-value resistors (10kΩ suggested), to en-
sure a low-level logic signal during any fault condition, while still allowing a
valid high logic level during normal operation.
FIGURE 1. ERROR Output Timing
PROGRAMMING THE OUTPUT VOLTAGE (LP2951)
The LP2951 may be pin-strapped for the nominal fixed output
voltage using its internal voltage divider by tying the output
and sense pins together, and also tying the feedback and
VTAP pins together. Alternatively, it may be programmed for
any output voltage between its 1.235V reference and its 30V
maximum rating. As seen in Figure 2, an external pair of re-
sistors is required.
The complete equation for the output voltage is
where VREF is the nominal 1.235 reference voltage and IFB is
the feedback pin bias current, nominally −20nA. The minimum
recommended load current of 1μA forces an upper limit of 1.2
MΩ on the value of R2, if the regulator must work with no load
(a condition often found in CMOS in standby). IFB will produce
a 2% typical error in VOUT which may be eliminated at room
temperature by trimming R1. For better accuracy, choosing
R2 = 100k reduces this error to 0.17% while increasing the
resistor program current to 12μA. Since the LP2951 typically
draws 60μA at no load with Pin 2 open-circuited, this is a small
price to pay.
*See Application Hints
20168107
**Drive with TTL-high to shut down. Ground or leave open if shutdown feature is not to be used.
Note: Pins 2 and 6 are left open.
FIGURE 2. Adjustable Regulator
REDUCING OUTPUT NOISE
In reference applications it may be advantageous to reduce
the AC noise present at the output. One method is to reduce
the regulator bandwidth by increasing the size of the output
capacitor.
Noise can be reduced fourfold by a bypass capacitor across
R1, since it reduces the high frequency gain from 4 to unity.
Pick
or about 0.01μF. When doing this, the output capacitor must
be increased to 3.3μF to maintain stability. These changes
reduce the output noise from 430μV to 100μV rms for a
100kHz bandwidth at 5V output. With the bypass capacitor
added, noise no longer scales with output voltage so that im-
provements are more dramatic at higher output voltages.
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