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LMH6551Q Datasheet, PDF (14/20 Pages) Texas Instruments – Differential, High Speed Op Amp
SINGLE ENDED INPUT TO DIFFERENTIAL OUTPUT
The LMH6551Q provides excellent performance as an active
balun transformer. Figure 3 shows a typical application where
an LMH6551Q is used to produce a differential signal from a
single ended source.
In single ended input operation the output common mode
voltage is set by the VCM pin as in fully differential mode. In
this mode the common mode feedback circuit must also,
recreate the signal that is not present on the unused differ-
ential input pin. The performance chart titled “Balance Error”
is the measurement of the effectiveness of the amplifier as a
transformer. The common mode feedback circuit is respon-
sible for ensuring balanced output with a single ended input.
Balance error is defined as the amount of input signal that
couples into the output common mode. It is measured as a
the undesired output common mode swing divided by the sig-
nal on the input. Balance error when the amplifier is driven
with a differential signal is nearly unmeasurable if the resistors
and board are well matched. Balance error can be caused by
either a channel to channel gain error, or phase error. Either
condition will produce a common mode shift. The chart titled
“Balance Error” measures the balance error with a single end-
ed input as that is the most demanding mode of operation for
the amplifier.
Supply and VCM pin bypassing is also critical in this mode of
operation. See the above section on FULLY DIFFERENTIAL
OPERATION for bypassing recommendations.
SINGLE SUPPLY OPERATION
The input stage of the LMH6551Q has a built in offset of 0.7V
towards the lower supply to accommodate single supply op-
eration with single ended inputs. As shown in Figure 6, the
input common mode voltage is less than the output common
voltage. It is set by current flowing through the feedback net-
work from the device output. The input common mode range
of 0.4V to 3.2V places constraints on gain settings. Possible
solutions to this limitation include AC coupling the input signal,
using split power supplies and limiting stage gain. AC cou-
pling with single supply is shown in Figure 7.
In Figure 6 closed loop gain = VO / VI = RF / 2RG. Note that in
single ended to differential operation VI is measured single
ended while VO is measured differentially. This means that
gain is really 1/2 or 6 dB less when measured on either of the
output pins separately. Additionally, note that the input signal
at RT is 1/2 of VI when RT is chosen to match RS to RIN.
VICM= Input common mode voltage = (V+IN+V−IN)/2.
30157909
FIGURE 7. AC Coupled for Single Supply Operation
DRIVING ANALOG TO DIGITAL CONVERTERS
Analog to digital converters (ADC) present challenging load
conditions. They typically have high impedance inputs with
large and often variable capacitive components. As well,
there are usually current spikes associated with switched ca-
pacitor or sample and hold circuits. Figure 8 shows a typical
circuit for driving an ADC. The two 56Ω resistors serve to iso-
late the capacitive loading of the ADC from the amplifier and
ensure stability. In addition, the resistors form part of a low
pass filter which helps to provide anti alias and noise reduc-
tion functions. The two 39 pF capacitors help to smooth the
current spikes associated with the internal switching circuits
of the ADC and also are a key component in the low pass
filtering of the ADC input. In the circuit of Figure 8 the cutoff
frequency of the filter is 1/ (2*π*56Ω *(39 pF + 14pF)) =
53MHz (which is slightly less than the sampling frequency).
Note that the ADC input capacitance must be factored into the
frequency response of the input filter, and that being a differ-
ential input the effective input capacitance is double. Also as
shown in Figure 8 the input capacitance to many ADCs is
variable based on the clock cycle. See the data sheet for your
particular ADC for details.
30157911
FIGURE 6. Relating Gain to Input / Output Common Mode
Voltages
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