TMS320F2809_16 Datasheet, PDF (133/147 Pages) Texas Instruments – Digital Signal Processors

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TMS320F2809, TMS320F2808, TMS320F2806
TMS320F2802, TMS320F2801, TMS320C2802
TMS320C2801, TMS320F28016, TMS320F28015
SPRS230N – OCTOBER 2003 – REVISED MAY 2012
6.13 ROM Timing (C280x only)
Table 6-48. ROM/OTP Access Timing
PARAMETER
t_a(rp)
t_a(rr)
t_a(ROM)
Paged ROM access time
Random ROM access time
ROM (OTP area) access time ⁽¹⁾
(1) In C280x devices, a 1K X 16 ROM block replaces the OTP block found in Flash devices.
MIN TYP MAX
19
19
60
Equations to compute the page wait-state and random wait-state in Table 6-49 are as follows:
ƪǒ Ǔ ƫ ROM Page Wait-State +
t_a(rp)
t_c(SCO)
*1
(round up to the next highest integer) or 0, whichever is larger
UNIT
ns
ns
ns
ƪǒ Ǔ ƫ ROM Random Wait-State +
t_a(rr)
t_c(SCO)
* 1 (round up to the next highest integer) or 1, whichever is larger
Table 6-49. ROM/ROM (OTP area) Minimum Required
Wait-States at Different Frequencies
SYSCLKOUT
(MHz)
100
75
50
30
25
15
4
SYSCLKOUT
(ns)
10
13.33
20
33.33
40
66.67
250
PAGE WAIT-
STATE
1
1
0
0
0
0
0
RANDOM WAIT-
STATE ⁽¹⁾
1
1
1
1
1
1
1
(1) Random wait-state must be greater than or equal to 1.
Copyright © 2003–2012, Texas Instruments Incorporated
Electrical Specifications 133
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TMS320C2801 TMS320F28016 TMS320F28015