UCC28250_12 Datasheet, PDF (13/53 Pages) Texas Instruments – Advanced PWM Controller With Pre-Bias Operation

UCC28250
www.ti.com
SLUSA29C – APRIL 2010 – REVISED JULY 2011
RT (Oscillator Frequency Set and Synchronization) (15/2)
The UCC28250 oscillator frequency is set by an external resistor connected between the RT pin and ground.
Switching frequency selection is a trade-off between efficiency and component size. Based on the selected
switching frequency, the programming resistor value can be calculated as:
1
R
T
=
2
´
f
SW
-
T
d(SP
)
33.2pF
(3)
In this equation, f_SW is the switching frequency and T_D(sp) is the dead time between synchronous rectifier turn-off
to primary switch turn-on. T_D(sp) is set by an external resistor between the SP pin and ground (refer to the SP pin
description).
Each output (OUTA, OUTB, SRA, SRB) switches at half the oscillator frequency (f_SW = ½ x f_OSC). Figure 6 shows
the relationship between RT and f_OSC at certain T_D(sp) and can be used to program oscillator frequency
accordingly.
2000
1800
1600
1400
OSCILLATOR FREQUENCY
vs
RT RESISTOR
T_D(ps) = 40 ns
1200
1000
800
600
400
T_D(ps) = 100 ns
200
0
0 20 40 60 80 100 120 140 160 180 200
RT Resistor - kW
Figure 6. Oscillator Frequency F_OSC vs External Resistance of RT at T_D(ps) = 40 ns and 100 ns
The UCC28250 can be synchronized to an external clock by applying an external clock source to the RT pin.
Synchronization helps with parallel operation and/or preventing beat frequency noise. The UCC28250
synchronizes its internal oscillator to an external frequency source ranging from 170 kHz to 2.3 MHz, which is
equivalent to an 85-kHz to 1.15-MHz switching frequency. The internal oscillator frequency is clamped to 170
kHz during synchronization if the external source frequency drops below 170 kHz.
The UCC28250 aligns the turn-on of primary outputs OUTA and OUTB to the falling edge of the synchronizing
signal, as shown in Figure 7. If the frequency source is from the gate outputs of another half bridge controller,
interleaving can be achieved. The interleaving angle is determined by the frequency source’s duty cycle. When a
50% duty cycle is applied, optimal interleaving is achieved, and EMI filters can be minimized.
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