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TPS54418_17 Datasheet, PDF (13/42 Pages) Texas Instruments – 2.95-V to 6-V Input, 4-A Output, 2-MHz , Synchronous Step-Down Switcher With Integrated FETs (SWIFT)
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TPS54418
SLVS946D – SEPTEMBER 2009 – REVISED DECEMBER 2014
Feature Description (continued)
To improve drop out, the TPS54418 device is designed to operate at 100% duty cycle as long as the BOOT to
PH pin voltage is greater than 2.5 V. The high-side MOSFET is turned off using an UVLO circuit, allowing for the
low-side MOSFET to conduct when the voltage from BOOT to PH drops below 2.5 V. Because the supply current
sourced from the BOOT pin is low, the high-side MOSFET can remain on for more switching cycles than are
required to refresh the capacitor, thus the effective duty cycle of the switching regulator is high.
8.3.4 Error Amplifier
The TPS54418 device has a transconductance amplifier. The error amplifier compares the VSENSE voltage to
the lower of the SS pin voltage or the internal 0.8 V voltage reference. The transconductance of the error
amplifier is 225 μA/V during normal operation. When the voltage of VSENSE pin is below 0.8 V and the device is
regulating using the SS voltage, the transconductance is 70 μA/V. The frequency compensation components are
placed between the COMP pin and ground.
8.3.5 Voltage Reference
The voltage reference system produces a precise ±1% voltage reference overtemperature by scaling the output
of a temperature stable bandgap circuit. The bandgap and scaling circuits produce 0.8 V at the non-inverting
input of the error amplifier.
8.3.6 Adjusting the Output Voltage
The output voltage is set with a resistor divider from the output node to the VSENSE pin. It is recommended to
use divider resistors with 1% tolerance or better. Start with a value of 100 kΩ for the R1 resistor and use
Equation 1 to calculate R2. To improve efficiency at very light loads, consider using larger resistor values. If the
values are too high, the regulator is more susceptible to noise and voltage errors from the VSENSE input current
are noticeable.
R2 = R1
´
æ 0.8 V ö
ç
è VO
-
0.8 V
÷
ø
(1)
VOUT
R1
VSENSE
R2
+
0.8 V
Figure 23. Voltage Divider Circuit
8.3.7 Enable and Adjusting Undervoltage Lockout
The TPS54418 device is disabled when the VIN pin voltage falls below 2.6 V. If an application requires a higher
under-voltage lockout (UVLO), use the EN pin as shown in Figure 24 to adjust the input voltage UVLO by using
two external resistors. It is recommended to use the enable resistors to set the UVLO falling threshold (VSTOP)
above 2.7 V. The rising threshold (VSTART) should be set to provide enough hysteresis to allow for any input
supply variations. The EN pin has an internal pull-up current source that provides the default condition of the
TPS54418 device operating when the EN pin floats. Once the EN pin voltage exceeds 1.25 V, an additional 2.55
μA of hysteresis is added. When the EN pin is pulled below 1.18 V, the 2.55 μA is removed. This additional
current facilitates input voltage hysteresis.
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