TPS54010-EP_16 Datasheet, PDF (13/31 Pages) Texas Instruments – 2.2-V to 4-V, 14-A OUTPUT SYNCHRONOUS BUCK PWM SWITCHER WITH INTEGRATED FETs

TPS54010-EP
www.ti.com
Capacitor Requirements
The important design factors for the output capacitor
are dc voltage rating, ripple current rating, and
equivalent series resistance (ESR). The dc voltage
and ripple current ratings cannot be exceeded. The
ESR is important because along with the inductor
current it determines the amount of output ripple
voltage. The actual value of the output capacitor is
not critical, but some practical limits do exist.
Consider the relationship between the desired closed-
loop crossover frequency of the design and LC corner
frequency of the output filter. In general, it is desirable
to keep the closed-loop crossover frequency at less
than 1/5 of the switching frequency. With high
switching frequencies such as the 500 kHz frequency
of this design, internal circuit limitations of the
TPS54010 limit the practical maximum crossover
frequency to about 70 kHz. To allow for adequate
phase gain in the compensation network, the LC
corner frequency should be about one decade or so
below the closed-loop crossover frequency. This
limits the minimum capacitor value for the output filter
to:
ǒ Ǔ COUT(MIN)
+
1
LOUT
2
K
2p ƒ_CO
(7)
Where K is the frequency multiplier for the spread
between f_LC and f_CO. K should be between 5 and 15,
typically 10 for one decade difference. For a desired
crossover of 100-kHz and a 0.68-µH inductor, the
minimum value for the output capacitor is 93 µF using
a minimum K factor of 5. Increasing the K factor
would require using a larger capacitance as 100 kHz
is approaching the maximum practical closed-loop
crossover frequency for this device. The selected
output capacitor must be rated for a voltage greater
than the desired output voltage plus one half the
ripple voltage. Any de-rating amount must also be
included. The maximum RMS ripple current in the
output capacitors is given by Equation 8:
ICOUT(RMS)
+
1
Ǹ₁₂
ȡ ǒ Ǔȣ _{VOUT VPVIN(MAX) * VOUT}
ȧȢ ȧȤ _{VPVIN(MAX) LOUT Fsw}
(8)
The calculated RMS ripple current is 780 mA in the
output capacitors.
The maximum ESR of the output capacitor is
determined by the amount of allowable output ripple
as specified in the initial design parameters. The
output ripple voltage is the inductor ripple current
times the ESR of the output filter; therefore, the
maximum specified ESR as listed in the capacitor
data sheet is given by Equation 9 :
SLVSBN3 – JANUARY 2013
ESRMAX + NC
ȡ ȣ _{VIN(MAX) LOUT Fsw 0.8}
ȧȢ _{ǒ Ǔ} ȧȤ _{VOUT VIN(MAX) * VOUT}
DVP_*P(MAX)
(9)
and the maximum ESR required is 22.2 mΩ. A
capacitor that meets these requirements is a Cornell
Dubilier Special Polymer (SP) ESRD101M06 rated at
6.3 V with a maximum ESR of 0.015 Ω and a ripple
current rating of 2 A. An additional small 0.1-µF
ceramic bypass capacitor C13 is a also used.
Other capacitor types work well with the TPS54010,
depending on the needs of the application.
Compensation Components
The external compensation used with the TPS54010
allows for a wide range of output filter configurations.
A large range of capacitor values and types of
dielectric are supported. The design example uses
Type-3 compensation consisting of R1, R3, R5, C6,
C7, and C8. Additionally, R2 along with R1 forms a
voltage divider network that sets the output voltage.
These component reference designators are the
same as those used in the SWIFT Designer
Software. There are a number of different ways to
design a compensation network. This procedure
outlines a relatively simple procedure that produces
good results with most output filter combinations. Use
the SWIFT Designer Software for designs with
unusually high closed-loop crossover frequencies,
low value, low ESR output capacitors such as
ceramics or if you are unsure about the design
procedure.
When designing compensation networks for the
TPS54010, a number of factors need to be
considered. The gain of the compensated error
amplifier should not be limited by the open-loop
amplifier gain characteristics and should not produce
excessive gain at the switching frequency. Also, the
closed-loop crossover frequency should be set less
than one-fifth of the switching frequency, and the
phase margin at crossover must be greater than 45
degrees. The general procedure outlined here
produces results consistent with these requirements
without going into great detail about the theory of loop
compensation.
First, calculate the output filter LC corner frequency
using Equation 10:
Ǹ ^{ƒLC +} 2p
1
LOUT COUT
(10)
For the design example, f_LC = 19.3 kHz.
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